• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.10
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• pp.1606-1616
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• 1989

In this paper, the design of DYNAMIC CMOS ARRAY LOGIC which has both advantages of dynamic CMOS and array logic circuits is proposed. The major components of DYNAMIC CMOS ARRAY LOGIC are two-stage dunamic CMOS circuits and an internal clock generator. The function block of dynamic CMOS circuits is realized as a parallel interconnection of NMOS transistors. Therefore the operating speed of DYNAMIC CMOS ARRAY LOGIC is much faster than the one of the conventional dynamic CMOS PLAs and static CMOS PLA. Also, the charge redistribution problem by internl delay is solved. The internal clock generator generates four internal clocks that drive all the dynamic CMOS circuits. During evaluation, two clocks of them are delayed as compared with others. Therefore the race problem is completoly eliminated. The internal clock generator also prevents the reduction of circuit output voltage and noise margin due to leakage current and charge coupling without any penalty in circuit operating speed or chip area utilization.

• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.6
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• pp.13-18
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• 1985

A set of utility programs for automatic generation, minimization and verification of high density PLA layout was developed, which includes equation-to-truth table translator, logic minimizer, PLA product term sorter, file generator for plotting stick diagram, dynamic CMOS PLA layout generator and bipartite row folded CMOS PLA layout generator. Size reduction is performed mainly by logic minimizer and bipartite row folder, and the maximal delay is reduced by sorter. The fOe for automatically generated layout is stored in CIF. Each program was written in Clanguage, and was run on VAX-11/750 (UNIX).

• Current Optics and Photonics
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• v.7 no.5
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• pp.574-581
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• 2023

A scheme is proposed to generate triangular waveforms with alterable symmetry. The key component is a cascaded single-drive Mach-Zehnder modulator (SD-MZM) and optical polarization beam splitter-combiner architecture. In this triangular waveform generator, the bias-induced phase shift, modulation index and controllable delay difference are changeable. To generate triangular waveform signals with different symmetry indexes, different combinations of these variables are selected. Compared with the previous schemes, this generator just contains one SD-MZM and the balanced photodetector (BPD) is not needed, which means the costs and energy consumption are significantly reduced. The operation principle of this triangular waveform generator has been theoretically analyzed, and the corresponding simulation is conducted. Based on the theoretical and simulated results, some experiments are demonstrated to prove the validity of the scheme. The triangular waveform signals with a symmetry factor range of 20-80% are generated. Both experiment and theory prove the feasibility of this method.

• Journal of IKEEE
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• v.15 no.1
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• pp.23-28
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• 2011

This paper describes design and implementation of a spread spectrum clock generator(SSCG). The proposed architecture generates the spread spectrum clock controlling a input voltage signal for VCDL(Voltage Controlled Delay Line). Spread charge pump is controlled by the SSC modulation logic block provides a control signal to VCDL through LPF in DLL. By using this architecture, chip area and power consumption can be reduced because it is not necessary additional circuit to control modulation rate. This circuit has been designed and fabricated using the UMC 0.25um CMOS technology. The chip occupies an area of 290${\times}$120um^2.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.201-210
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• 2018

This paper proposes a new start-up method for a load commutated inverter (LCI) in a large synchronous gas-turbine generator. The initial rotor position for start-up torque is detected by the proposed initial angle detector, which consists of an integrator and a phase-locked loop. The initial rotor position is accurately detected within 150ms, and the angle difference between the real position and the detected position is less than 1%. The LCI system operates in two modes (forced commutation mode and natural commutation mode) according to operating speed range. The proposed controllers include a forced commutation controller for the low-speed range, a PI speed controller and a PI current controller, where the forced commutation controller is connected to the current controller in parallel. The current controller is modeled by Matlab/Simulink, where a six-pulse delay of the thyristor and a processing delay are considered by using a zero-order hold. The performance of the proposed start-up method is evaluated in Matlab/Psim at standstill and at low speed. To verify the feasibility of the method, a 5kVA LCI system prototype is implemented, and the proposed initial angle detector and the system performance are confirmed by experimental results from standstill to 900rpm.

• Journal of the Korean Society of Industry Convergence
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• v.22 no.3
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• pp.251-257
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• 2019

This paper proposes a new measurement method using virtual power concept to measure the effective value of 3-phase voltage with variable frequency. The conventional effective value measurement method uses a method of integrating data sampled during one or half cycle of the power voltage and averaging it. In this method, since the effective voltage is calculated every cycle, a time delay occurs in the measured effective voltage and it is s a problem to measure the effective value of a device whose frequency varies from time to time, such as a generator. The proposed 3-phase voltage rms measurement method has an advantage that it can measure accurate voltage RMS value regardless of measurement frequency variation. In particular, there is an advantage in that it is possible to measure a 3-phase effective voltage rather than an average value of the effective voltage of each phase in a 3-phase unbalance voltage. In addition, the validity of the proposed method is verified by using the Psim simulation tool and the experimental results are analyzed by applying the proposed measurement algorithm to the actual three phase synchronous generator voltage measurement experiment.

• Journal of Bio-Environment Control
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• v.5 no.2
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• pp.174-186
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• 1996

This study was carried out in order to understand the plan, design, constructing and actual condition of management of modernized horticultural facilities in Kyungpook Province which had been constructed from 1992 to 1995 funded by Government support. The aim of this study is to provide reference data for success of the forth project. It was performed by making up a question about driving of project and management condition of equipment after constructing. The results obtained from this study are as follows: 1. 73.5% of facilities horticulture farmhouse recognized that the prospect of greenhouse is bright, but 92.5% of the farmhouse also recognised that they need technical consultation on protected horticulture farming. Therefore, technical educations would must be enhanced about foundation of greenhouse and cultivation technique. 2. The holding times of explanatory meetings, cause of understanding to farmhouse, were one or two times in greenhouse construction, and 62.5% of the farmhouse expressed the insufficiency at the explanation and educational data. For this reason, it was judged that the construction contract had been delayed more than 5 months in 49.3% of the farmhouse after the decision of project budget. 3. In constructing after a contract, the rates of construction delay is 53.4% and defect occurrence is 41.1%. The biggest reasons of construction delay was insufficiency of worker and materials supply. Each percentage is 29.1%. And the reason of defect occurrence is badness of machinery equipment(62.9% ). 4. In management of greenhouse, a pipe-constructed plastic film greenhouse changes plastic film every one and three years because of sticking dust on plastic film. It was needed to about in cleaning technique of coverings. Because that used 3-5 years only half of the expected life span. 5. The order of broken rating in the subsidiary equipment is like this lollop ventilator (42.8%), a general control system(33.3%) especially, in the case of a general control system, the rate of all family can control is 52.7%. so, it is time to develop easy control equipment which every one could use as soon as possible. 6. When choose heat generator as decide capacity, the most priority is the mount of heat generator the percent is 45.5% heat generator and as decide model, the private purchase's percent is 77.3%. It is higher than a public bidding heat generator the percent is 22.7% heat generator when it compare with a public bidding. In the case of $CO_2$ generator, using rate is only 19.0%. The using rate is very low, so it needs education how to use depends on the way of the subsidiary equipment. 7. In the case of seedlings, it is asked to use factory-processed seedling effectively. because it's difficult to get security of labors(58.8%), hoped crops (55.9%) access same crops(29.4%) much more and changing of crops depends on market situation. that is the main reason the lack of knowhow.

• Journal of electromagnetic engineering and science
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• v.11 no.3
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• pp.213-219
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• 2011

Simulative target generators are needed for testing and calibrating various radar systems. The generator in this study discriminates the transmitting frequency from a radar and simulates parameters like target range, range rate, and atmospheric attenuation using the digital RF memory technique. The simulative target echo is then sent to the radar for testing and evaluation. This paper proposes a novel architecture for controlling the digital RF memory so it continually writes ADC data to the memory and reads it for the DAC with increasing one step address in order to control the delay of target range in a simple way. The target echo is programmed according to various preprogrammed scenarios and is generated in real time using a wireless local area network (LAN). To analyze the detected and generated target information easily, the system times for the radar and simulative target generator are synchronized using a global positioning system (GPS).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.8A
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• pp.950-961
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• 2004

In this paper, we measured and analyzed propagation characteristics in a subway tunnel that is recently increasingly becoming one of the radio communication environments. The measurements are carried out in a subway tunnel with frequency bands of 2.45㎓ and 5.8㎓. The length of tunnel we used for this study is 175m of LOS (Line-of-sight) and 270m of NLOS (Non Line-of-Sight). The subway tunnel is curved and its cross section is horseshoe type. The measurement systems we employ in this study are a narrow-band system and a wide-band system. The narrow-band system is used to get path loss measurement and the wide-band system is used to figure out delay profile measurement. In particular, the wide-band system consists of 1023 length PN sequence generator using a chip rate of 80MHz based on a sliding correlation technique. The omni-directional antennas and directional antennas are used to analyze propagation characteristics for beam type of antenna. The path loss displays only pure path loss of a tunnel environment. The delay profile indicates the mean excess delay and RMS (root mean square) delay spread.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.95-98
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• 2012

This paper describes a multiphase delay-locked loop (DLL) that generates a 32-phase output clock over the operating frequency range of 40 MHz to 280 MHz. The matrix-based delay line is used for high resolution of 1-bit delay. A calibration scheme, which improves the linearity of a delay line, is achieved by calibrating the nonlinearity of the input stage of the matrix. The multi-phase DLL is fabricated by using 0.11-${\mu}m$ CMOS process with a 1.2 V supply. At the operating frequency of 125MHz, the measurement results shows that the DNL is less than +0.51/-0.12 LSB, and the measured peak-to-peak jitter of the multi-phase DLL is 30 ps with input peak-to-peak jitter of 12.9 ps. The area and power consumption of the implemented DLL are $480{\times}550{\mu}m^2$ and 9.6 mW at the supply voltage of 1.2 V, respectively.