• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.259-262
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• 2012

This paper describes a delay-locked loop (DLL) that generates a 64-phase clock with the operating frequency of 125MHz. The proposed DLL use a $4{\times}8$ matrix-based delay line to improve the linearity of a delay line. The output clock with 64-phase is generated by using a CMOS multiplex and a inverted-based interpolator from 32-phase clock which is the output clock of the $4{\times}8$ matrix-based delay line. The circuit for an initial phase lock, which is independent on the duty cycle ratio of the input clock, is used to prevent from the harmonic lock of a DLL. The proposed DLL is designed using a $0.18-{\mu}m$ CMOS process with a 1.8 V supply. The simulated operating frequency range is 40 MHz to 200 MHz. At the operating frequency of a 125 MHz, the worst phase error and jitter of a 64-phase clock are +11/-12 ps and 6.58 ps, respectively.

• Journal of Broadcast Engineering
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• v.12 no.1 s.34
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• pp.28-40
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• 2007

In this paper, we proposes an idea for improved sound characteristic which decreasing a problem in previous reverberation algorism structure. To later reflection sound, proposed new reverberation structure, using a lopped and nested all-pass delay line, and it is designed to improve an natural concert hall sound. In addition, In order to have best imaginary sound effect, we extracted the factors by controlling each delay line's delay time, and we realized a proposed new algorithm by using general-purpose DSP. Through several experimental cases, we observed better effect on improvement of linear flatten and reverberation density and decreasing about colorlessness and non-linear sound at previous proposed model about impulse input.

• Journal of the Korean Institute of Telematics and Electronics
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• v.3 no.1
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• pp.12-17
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• 1966

A more extensive theoretical analysis for a ferrite filled electromagnetic delay line of two coaxial anisotropic conducting cylinders was made and improvements of the delay line n=0 mode operation was achieved by separating effective sections using short-circuited coils to eliminate unnecessary couplings among windings of different phase. Time delay of order of 10 microseconds per meter in video frequency range was observed from 3"/8 diameter 6" long delay line tilled with ferrite material. Design formula was presented with illustrative discussions to help design for practical purposes. purposes.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.4
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• pp.861-864
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• 2005

In this paper, we system the system design and numerical analysis of the ultrafast optical delay line using by optical phase modulator. The numerical analysis carried out with 1310nm, lops laser and electro-optic phase modulator. As the results of numerical analysis, we show a scanning rate of 0.5 GHz and a delay range of 19.0ps. Compare with mechanical delay line, the optical delay line has a high scanning speed and a high repetition rate.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.4
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• pp.112-118
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• 2010

This paper describes a noise suppression system based on a normalization method using a time-delay neural network and line spectrum pair having a parameter of frequency domain. First, a time-delay neural network is trained using line spectrum pair values of noisy speech signals obtained by linear prediction analysis. After trained the time-delay neural network, the proposed system enhances speech signals that are degraded by a background noise. Accordingly, the proposed time-delay neural network restores from the line spectrum pair values of noisy speech signals to the line spectrum pair values of clean speech signals. It is confirmed that this system is effective for speech signals degraded by a background noise, judging from spectral distortion measurement.

• Current Optics and Photonics
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• v.2 no.1
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• pp.34-38
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• 2018

An X-band microwave photonic (MWP) filter using switch-based fiber-optic delay lines has been proposed and experimentally demonstrated. It is composed of two electro-optic modulators (EOMs) and $2{\times}2$ optical MEMS-switch-based fiber-optic delay lines. By changing time-delay difference and coefficients of each wavelength signal by using fiber-optic delay lines and an electro-optic modulator, respectively, a bandpass filter or a notch filter can be implemented. For an X-band MWP filter with four channel elements, fiber-optic delay lines with the unit time-delay of 50 ps have been experimentally realized and the frequency responses corresponding to the time-delays has been measured. The measured frequency response error at center frequency and the time-delay difference error were 180 MHz at 10 GHz and 3.2 ps, respectively, when the fiber-optic delay line has the time-delay difference of 50 ps.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.6
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• pp.137-143
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• 2015

A delay-line type time-to-digital converter (TDC) implemented in a field-programmable gate array (FPGA) is most widely owing due to its simple structure and high conversion rate. However, the delay-line type TDC suffers from nonlinearity error caused by the long delay-line because its time interval measurement range is determined by the length of the used delay line. In this study, a new TDC structure with a shorter delay line by taking a pulse train as an input is proposed for improved time accuracy and efficient use of resources. The proposed TDC utilizes a pulse-train with four transitions and a transition state detector that identifies the used transition among four transitions and prevents the meta-stable state without a synchronizer. With 72 delay cells, the measured resolution and maximum non-linearity were 20.53 ps, and 1.46 LSB, respectively, and the time interval measurement range was 5070 ps which was enhanced by approximately 343 % compared to the conventional delay-line type TDC.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.12
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• pp.31-44
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• 1996

Since optical delay line signal processing which utilizes optical fiber as delay line elements can provide high speed and broadband signal processing, the optical delay line signal processing has numerous applications. Recently, many research papers which optical delay line signal processing techniques are being applied to OCDMA are published. The author has published paper on the design method for optical fiber filters of lattice structure. However, the previous design method does not realize the transfer function all the time. It can be realized with constraints. In this paper, we propose the design method that can realize the transfer function all the time without any constraints for the optical fiber filter of lattice structure.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.1
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• pp.137-144
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• 2013

A delay-locked loop (DLL) that generates a 32-phase clock with the operating frequency of 125 MHz is introduced. The proposed DLL uses a delay line of $4{\times}8$ matrix architecture to improve a differential non-linearity (DNL) of the delay line. Furthermore, a integral non-linearity (INL) of the proposed DLL is improved by calibrating phases of clocks that is supplied to four points of an input stage of the $4{\times}8$ matrix delay line. The proposed DLL is fabricated by using $0.11-{\mu}m$ CMOS process with a 1.2 V supply. The measured operating frequency range of the implemented DLL is 40 MHz to 280 MHz. At the operating frequency of 125MHz, the measurement results shows that the DNL and INL are +0.14/-0.496 LSB and +0.46/-0.404 LSB, respectively. The measured peak-to-peak jitter of the output clock is 30 ps when the peak-to-peak jitter of the input clock is 12.9 ps. The area and power consumption of the implemented DLL are $480{\times}550{\mu}m^2$ and 9.6 mW, respectively.

• Proceedings of the KSR Conference
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• 2011.10a
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• pp.1960-1965
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• 2011

Train operations run trains to well-scheduled time table and the ideal case would be to have the trains running exactly as scheduled. The train delay resulted from the overcrowding takes place frequently in Seoul metro line 2, and doesn't keep the predefined headway. It requires to analyze the train delay caused from the overcrowding. In this paper we modeled, simulated, and analyzed the delay to disclose the effects in the line 2 operation. The modeling consists of trains entering into the line, running on the line and exiting from the line. The simulation carries out with statistical perturbation and analyzes the disturbance.