• The KIPS Transactions:PartA
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• v.12A no.7 s.97
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• pp.583-588
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• 2005

To develop SoC program for embedded systems, a tool that can remotely debug from host system is needed. Because the existing remote debugging systems using GDB don't offer information of the SoC program execution in real-time, it is difficult to observe condition of the program execution, and also they have limited characteristics to tools and use costly adaptors. In this paper, a real-time tracking tool that can record SoC status on the nv each execution of the assigned instructions is introduced and an economical USB-JTAG adaptor is proposed. And it is shown that this tool can track the execution of a composed program in the target system based on PXA255 processor.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.7
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• pp.1653-1659
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• 2013

In this paper, we propose a new ECAD software for efficiently analyzing and debugging of digital architecture implemented in Verilog HDL or VHDL codes. This software firstly elaborates HDL codes so as to extract internal architecture structure, then generates several graphical aids such as hierarchical schematics by applying placement and routing algorithm, object tree to show configuration of each module, instance tree to show hierarchical structure of instances, and SPD (Signal Propagation Diagram) to show internal interconnections. It is more important function that same objects in different views(HDL codes, object tree, instance tree, SPD, waveform etc.) can be highlighted at the starting any object. These functions are sure to improve efficiency of manual job to fix bugs or to analyze HDL codes.

• The KIPS Transactions:PartA
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• v.15A no.2
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• pp.87-94
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• 2008

Message races should be detected for debugging effectively message-passing programs because they can cause non-deterministic executions of a program. Previous tools for detecting message races report that message races occur in every receive operation which is expected to receive any messages. However message races might not occur in the receive operation if each of messages is transmitted through a different logical communication channel so that their incorrect detection makes it a difficult task for programmers to debug programs. In this paper we suggest a tool, MPIRace-Check, which can exactly detect message races by checking the concurrency between send/receive operations, and by inspecting the logical communication channels of the messages. To detect message races, this tool uses the vector timestamp to check if send and receive operations are concurrent during an execution of a program and it also uses the message envelop to inspect if the logical communication channels of transmitted messages are the same. In our experiment, we show that our tool can exactly detect message races with efficiency using MPI_RTED and a benchmark program. By detecting message races exactly, therefore, our tool enables programmers to develop reliable parallel programs reducing the burden of debugging.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.7
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• pp.341-348
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• 2005

Detecting unaffected race conditions is important for debugging message-passing programs effectively, because such races can influence other races to occur or not. The previous technique used in detecting unaffected races detects a race by halting the execution of a process at the receive event of the race that errors first in the process. However this technique does not guarantee that all of the detected races are unaffected, because halting the execution of processes does disconnect some chains of affects-relations among those races. Tn this paper. we improved the second pass algorithm of the previous technique by producing information about affects-relations of the races that occur first in each Process. Then we effectively visualize affect-relations among the races detected in each process. This visualization is effective in detecting visually unaffected races by simplifying affects-relations among the races which occur first In each Process.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.6
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• pp.94-105
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• 2008

Numerous platforms have been developed for ZigBee-based network embedded systems. Also, operating systems like TinyOS have been installed to facilitate efficient implementation of wireless sensor network applications which collect data, and/or execute commands. First of all, porting an operating system on a new platform may need invention of a substitute for a required but unsupported hardware component. This paper presents a multiplexed virtual system timer for a platform without a counter comparator which we have contrived to emulate by using an extra counter. Such porting also injects unexpected faults which cause a variety of painful failures. Unfortunately, TinyOS requires to handle a lot of asynchronous hardware interrupts which are hard to trace during debugging. Besides, simulators are not available for a new platform since the models of hardware on the platform are not usually developed, yet. We propose novel instrumentation techniques which can be used to effectively trace the bugs in such lack of debugging environment. These techniques are used to identify and fix a great deal of nasty issues in porting TinyOS 2.0 on MG2400 and MG2455 platforms made by RadioPulse Inc.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.180-183
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• 2000

This paper presents a technique used for verifying the design of AE32000, a 32-bit microprocessor core. We follow the commonly used verification procedure while speeding up and completing the debugging process by adopting a reverse engineering scheme.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1984.10a
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• pp.98-100
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• 1984

This paper design the emulator of the 8 bit microprocessor based on the z-80. The system control the debugging relation ship concerning the hardware and the software between the target system and the host system. It is purpose that emulator manufacture low cost.

• Proceedings of the Korean Reliability Society Conference
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• 2006.05a
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• pp.57-57
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• 2006

• The Transactions of the Korea Information Processing Society
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• v.4 no.4
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• pp.982-992
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• 1997

Almost all the software develpoment cost is especially spwnede in the test phase of kifecycle.Backtracking method and program slicing methed are often used for debugging.But these have need of abundant experience on debuggers or can't apply for large scale programs.In this paper, I used informations of design documents which is generally used, and proposed a new determination method of error positions combining backtracking method and program slcing method.I described several fundamental concepts, error classes, standard design documents and determination method of error positions to porpose a debugging method, and I explained the process of proposed method using an example program with errors.Finally, I compared and analysed the proposed method with usual slicing methods.

• Journal of Advanced Navigation Technology
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• v.14 no.1
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• pp.119-126
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• 2010

The software reliability growth model(SRGM) has been developed in order to estimate such reliability measures as remaining fault number, failure rate and reliability for the developing stage software. Almost of them assumed that the faults detected during testing were eventually removed. Namely, they have studied SRGM based on the assumption that the faults detected during testing were perfectly removed. The fault removing efficiency, however, is imperfect and it is widely known as so in general. It is very difficult to remove detected fault perfectly because the fault detecting is not easy and new error may be introduced during debugging and correcting. Therefore, We want to study imperfect software testing effort for the logistic testing effort which is thought to be the most adequate in this paper.