• Title/Summary/Keyword: DSP Processor Array

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Development of the Digital Controller for High Precision Digital Power Supply (고정밀전원장치를 위한 디지털 제어기 개발)

  • Ha, K.M.;Lee, S.K.;Kim, Y.S.
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2006.06a
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    • pp.249-250
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    • 2006
  • In this paper, hardware design and implementation of digital controller for the High Precision Digital Power Supply (HPDPS) based on Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA) is presented. Developed digital controller is composed of high resolution Digital Pulse Width Modulation (DPWM) and high resolution analog to digital converter circuit with anti-aliasing filter. And Digital Signal Processor (DSP) has the capability of a few micro-second calculation time for one feedback loop. 32-bit DSP and DPWM with 150[ps] step resolution is used to implement the HPDPS. Also 18-bit 2 mega sample per second ADC board is adopted for the developed digital controller. Also, hardware structure of the developed digital controller and experimental results of the first prototype board for HPDPS is described.

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Implementation of a Thermal Imaging System with Focal Plane Array Typed Sensor (초점면 배열 방식의 열상카메라 시스템의 구현)

  • 박세화;원동혁;오세중;윤대섭
    • Journal of Institute of Control, Robotics and Systems
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    • v.6 no.5
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    • pp.396-403
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    • 2000
  • A thermal imaging system is implemented for the measurement and the analysis of the thermal distribution of the target objects. The main part of the system is a thermal camera in which a focal plane array typed sensor is introduced. The sensor detects the mid-range infrared spectrum of target objects and then it outputs a generic video signal which should be processed to form a frame thermal image. Here, a digital signal processor(DSP) is applied for the high speed processing of the sensor signals. The DSP controls analog-to-digital converter, performs correction algorithms and outputs the frame thermal data to frame buffers. With the frame buffers can be generated a NTSC signal and transferred the frame data to personal computer(PC) for the analysis and a monitoring of the thermal scenes. By performing the signal processing functions in the DSP the overall system achieves a simple configuration. Several experimental results indicate the performance of the overall system.

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Implementation of Mobile WiMAX Receiver using Mobile Computing Platform for SDR System (모바일 컴퓨팅 플랫폼을 이용한 SDR 기반 MOBILE WIMAX 수신기 구현)

  • Kim, Han Taek;Ahn, Chi Young;Kim, June;Choi, Seung Won
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.8 no.1
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    • pp.117-123
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    • 2012
  • This paper implements mobile Worldwide Interoperability for Microwave Access (WiMAX) receiver using Software Defined Radio (SDR) technology. SDR system is difficult to implement on the mobile handset because of restrictions that are computing power and under space constraints. The implemented receiver processes mobile WiMAX software modem on Open Multimedia Application Platform (OMAP) System on Chip (SoC) and Field Programmable Gate Array (FPGA). OMAP SoC is composed of ARM processor and Digital Signal Processor (DSP). ARM processor supports Single Instruction Multiple Data (SIMD) instruction which could operate on a vector of data with a single instruction and DSP is powerful image and video accelerators. For this reason, we suggest the possibility of SDR technology in the mobile handset. In order to verify the performance of the mobile WiMAX receiver, we measure the software modem runtime respectively. The experimental results show that the proposed receiver is able to do real-time signal processing.

FPGA-DSP Based Implementation of Lane and Vehicle Detection (FPGA와 DSP를 이용한 실시간 차선 및 차량인식 시스템 구현)

  • Kim, Il-Ho;Kim, Gyeong-Hwan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.12C
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    • pp.727-737
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    • 2011
  • This paper presents an implementation scheme of real-time lane and vehicle detection system with FPGA and DSP. In this type of implementation, defining the functionality of each device in efficient manner is of crucial importance. The FPGA is in charge of extracting features from input image sequences in reduced form, and the features are provided to the DSP so that tracking lanes and vehicles are performed based on them. In addition, a way of seamless interconnection between those devices is presented. The experimental results show that the system is able to process at least 15 frames per second for video image sequences with size of $640{\times}480$.

Design of Parallel Algorithms for Conventional Matched-Field Processing over Array of DSP Processors (다중 DSP 프로세서 기반의 병렬 수중정합장처리 알고리즘 설계)

  • Kim, Keon-Wook
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.4 s.316
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    • pp.101-108
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    • 2007
  • Parallel processing algorithms, coupled with advanced networking and distributed computing architectures, improve the overall computational performance, dependability, and versatility of a digital signal processing system In this paper, novel parallel algorithms are introduced and investigated for advanced sonar algorithm, conventional matched-field processing (CMFP). Based on a specific domain, each parallel algorithm decomposes the sequential workload in order to obtain scalable parallel speedup. Depending on the processing requirement of the algorithm, the computational performance of the parallel algorithm reveals different characteristics. The high-complexity algorithm, CMFP shows scalable parallel performance on the array of DSP processors. The impact on parallel performance due to workload balancing, communication scheme, algorithm complexity, processor speed, network performance, and testbed configuration is explored.

Implementation of Speech Enhancement System using Matched Filter Array (Matched filter Array를 이용한 음질 향상 시스템 구현)

  • 오승수;김기만
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1999.11a
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    • pp.173-176
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    • 1999
  • Recently, speaker localizing estimation technique has been rising in teleconference systems. In this system, it is recognized speaker location using microphone array and camera is directed to speaker location automatically. In this paper, it was described to be able to enhance the speech qualify through microphone array, decrease computational loads using IIR filter as inverse filter, and confirmed to implement hardware using DSP processor.

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Performance Enhancement of Underwater Acoustic Communication System Using Hydrophone Transmit Array (하이드로폰 송신 어레이를 이용한 수중 음향 통신 시스템의 성능 향상)

  • 이외형;손윤준;김기만
    • The Journal of the Acoustical Society of Korea
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    • v.21 no.7
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    • pp.606-613
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    • 2002
  • In this paper we applied a transmit beamforming technique to the underwater acoustic communication system for high rate data transmission. A prototype transmit system was designed and implemented with the general purpose DSP processor and multiple digital-to-analog converters. The performances of the implemented system were evaluated by the experiment in water tank. In order to simplify the procedure the channel coding and equalizer were omitted. And the simplest OOK (On-Off Keying) technique in digital communication methods was applied. The experimental result shows that the transmission data rate is higher about 3 times in the case of 5 hydrophone transmitting may than 1 hydrophone transmitter at bit error rate 10/sup -2/. We verified that the maximum data rate was 400 bps for speech signal transmission in water tank.

Implementation of GPU System for SDR in WiBro Environment (WiBro 환경에서 SDR을 위한 GPU 시스템 구현)

  • Ahn, Sung-Soo;Lee, Jung-Suk
    • 전자공학회논문지 IE
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    • v.48 no.3
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    • pp.20-25
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    • 2011
  • We developed a method of accelerating the operation speed of communication systems for SDR(Software Defined Radio) systems in WiBro environment. In this paper, we propose a new scheme of using GPU(Graphics Processing Unit) for implementing the communication system which perform with the functionality of SDR. In general, communication systems is made by DSP(Digital Signalling Processor) or FPGA(Field Programmable Gate Array). However, in this case, there are exist the problem of implementation and debugging caused by each CPU characteristic. The GPU is optimized for vector processing because it usually consists of multiple processors and each processor in GPU is composed of a set of threads. We also developed Framework to use GPU and CPU resources effectively for reducing the operation time. From the various simulation, it is confirmed that GPU system have good performance in WiBro system.

A Study on the Improvement of Image Quality for a Thermal Imaging System with focal Plane Array Typed Sensor (초점면 배열 방식 열상 카메라 시스템의 화질 개선 연구)

  • 박세화
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.1 no.2
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    • pp.27-31
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    • 2000
  • Thermal imaging system is implemented for the measurement and the analysis of the thermal distribution of the target objects. The main Part of the system is thermal camera in which a focal plane array typed sensor is introduced The sensor detects mid-range infrared spectrum or target objects and then it output generic video signal which should be processed to form a thermal image frame. A digital signal processor(DSP) in the system inputs analog to digital converted data. performs algorithms to improve the thermal images and then outputs the corrected frame data to frame buffers for NTSC encoding and for digital outputs.. To enhance the quality of the thermal images, two point correction method is applied. Figures indicate that the corrected thermal images are much improved.

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MOBILE WIMAX 기반 향상된 다중 안테나 시스템의 고정소수점 설계

  • Kim, Hak-Min;Ahn, Chi-Young;Yun, Yu-Suk;Jung, Jae-Ho;Choi, Seung-Won
    • 한국정보통신설비학회:학술대회논문집
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    • 2008.08a
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    • pp.409-413
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    • 2008
  • In this paper, we introduce a platform of advanced multiple antenna system based on orthogonal frequency-division multiplexing (OFDM). The advanced multiple antennas have beamforming gain using array antenna. In array antenna systems, received signal has phase delay caused distance of each antennas, therefore it should compensate with optimum weight vector which calculated by Lagrange algorithm. To implement the presented above procedures using Digital Signal Processor (DSP), we should fixed-point design. The performance of implemented platform is verified through MATLAB$^{(R)}$ simulations with various signal environments.

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