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Design of Parallel Algorithms for Conventional Matched-Field Processing over Array of DSP Processors  

Kim, Keon-Wook (Electronics Engineering, Dongguk University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SP / v.44, no.4, 2007 , pp. 101-108 More about this Journal
Abstract
Parallel processing algorithms, coupled with advanced networking and distributed computing architectures, improve the overall computational performance, dependability, and versatility of a digital signal processing system In this paper, novel parallel algorithms are introduced and investigated for advanced sonar algorithm, conventional matched-field processing (CMFP). Based on a specific domain, each parallel algorithm decomposes the sequential workload in order to obtain scalable parallel speedup. Depending on the processing requirement of the algorithm, the computational performance of the parallel algorithm reveals different characteristics. The high-complexity algorithm, CMFP shows scalable parallel performance on the array of DSP processors. The impact on parallel performance due to workload balancing, communication scheme, algorithm complexity, processor speed, network performance, and testbed configuration is explored.
Keywords
Parallel Processing; Match-Field Processing; DSP Processor Array; Beamforming; SONAR;
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