• Proceedings of the Korean Society of Marine Engineers Conference
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• 2006.06a
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• pp.109-110
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• 2006

The performance of a digital baseband signal processing and data transmission rate depends on the modulation technique. In this paper, We implemented DSP communication system for Underwater acoustic communication using by adaptive BPSK modem technique. In order to implement adaptive modem, we suggested SNR detection block. SNR detection block has the reference SNR value that selects between window filter path and matched filter path. In this paper, suggested system is based on software interface and all Hardware(PLL, modem filter, equalizer etc) is implemented by software, exclusive of DSP, A/D, D/A converter, SDRAM and Flash memory.

• ETRI Journal
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• v.19 no.3
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• pp.228-241
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• 1997

In this paper, we present a design of modem and vocoder digital signal processor (DSP) chips for CDMA mobile station. The modem chip integrates CDMA reverse link modulator, CDMA forward link demodulator and Viterbi decoder. This chip contains 89,000 gates and 29 kbit RAMs, and the chip size is $10 mm{\times}10.1 mm$ which is fabricated using a $0.8{\mu}m$ 2 metal CMOs technology. To carry out the system-level simulation, models of the base station modulator, the fading channel, the automatic gain control loop, and the microcontroller were developed and interfaced with a gate-level description of the modem application specific integrated circuit (ASIC). The Modem chip is now successfully working in the real CDMA mobile station on its first fab-out. A new DSP architecture was designed to implement the Qualcomm code exited linear prediction (QCELP) vocoder algorithm in an efficient way. The 16 bit vocoder DSP chip has an architecture which supports direct and immediate addressing modes in one instruction cycle, combined with a RISC-type instruction set. This turns out to be effective for the implementation of vocoder algorithm in terms of performance and power consumption. The implementation of QCELP algorithm in our DSP requires only 28 million instruction per second (MIPS) of computation and 290 mW of power consumption. The DSP chip contains 32,000 gates, 32K ($2k{\times}16\;bit$) RAM, and 240k ($10k{\times}24\;bit$) ROM. The die size is $8.7\;mm{\times}8.3\;mm$ and chip is fabricated using $0.8\;{\mu}m$ CMOS technology.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.4
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• pp.810-816
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• 2011

The existing underwater acoustic communications modem is developing based on commercial products, so it is possible on functionality and performance of underwater acoustic communications modem implementation. But the production of development system is required to single platform system implementation at the system's size and cost. So this paper designs and implements the signal processing module as an important role to single hardware platform production of underwater acoustic communication modem by using TigerSHARC DSP processor.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.258-261
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• 2010

The existing underwater acoustic communications modem is developing based on commercial products, so it is possible on functionality and performance of under water acoustic communications modem implementation. But the production of development system is required to single platform system implementation at the system' s size and cost. So this thesis designs and implements the signal processing module as an important role to single hardware platform production of underwater acoustic communication modem by using TigerSHARC DSP chip.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.3
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• pp.275-281
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• 2014

Recently, the need for various underwater application systems targeting efficient resource exploration and aquatic ecosystem monitoring is rapidly increasing in littoral sea and inland waters. In this paper, we focus on the research and development of digital module of acoustic micro modem which can be used for underwater mobile communication systems and underwater sensor network systems. Specifically, a digital module of acoustic modem embedding digital signal processor is designed and implemented. On top of the developed hardware platform, physical layer frame generation and recovery and channel coding algorithms are mounted and tested in a water tank and a pond to verify its functionality and performance. According to experimental results, less than 1 percent of total computational power is consumed in the processing of frame control and convolutional code with the data rate of 1 kbps. Thus, the performance of micro modem could be improved by loading efficient baseband algorithms into the processor while maintaining the implemented hardware.

• Proceedings of the KIEE Conference
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• 2002.07d
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• pp.2637-2639
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• 2002

This paper presents the design and implementation of a baseband Modem using DSP that supports a wireless LAN. It is implemented with DSP and D/A and A/D Converters in baseband and tested without using IF and RF modules. In this paper, we have used the matched filler and DLL(delay lock loop) for synchronization. And the matched filter and the carrier recovery are directly connected. Therefore, the proposed architecture is very simple and the operation of DSP becomes fast.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.10C
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• pp.1433-1443
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• 2004

The power line modem proposed in this paper transmits the remote control signal using CSK(Code Shift Keying) and DS/SS method. The CSK technique provides the increased capacity of transmission and robustness towards noise. Besides, the DS/SS technique provides protection against narrow-band Gaussian interference and multi-path interference. The modem supports full-duplex communication using FDD(Frequency Division Duplex) and the modem structure for forward link is same with that for reverse link. To switch each sub-controlled unit smoothly, 4/$\pi$-DQPSK is adopted for noncoherent demodulation. The PN code for spreading spectrum seues to divide each group which consists of sub-controlled units and Walsh code is used for the M-ary CSK technique. Each block is designed and verified with TMS320C5402 DSP. We show the superiority of the proposed method by analyzing numerically the system performance for the factors of the DS/SS and CSK method ullder additive white Gaussian noise and PBI.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.5
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• pp.817-826
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• 2001

In this paper, we implemented QPSK(Quadrature Phase-Shift Keying) modem which is widely used for communication systems, using a general Digital Signal Processor(DSP), TM320C31. Up to now, almost all of communication systems consist of hardware. However, the implemented system herein is composed of software and hardware part. Software part includes the modulation process, before passing D/A(Digital-to-Analog Converter) and the demodulation process, after passing A/D(Analog-to-Digital Converter) in IF(Intermediate Frequency) node. Hardware part is related to input, output and process of signal. To demonstrate the successful implementation of modem, the output results obtained from DSP processor are compared with the simulated result on the personal computer.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.6
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• pp.69-77
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• 2002

In this paper, we present the CDMA2000 1x compliant mobile station modem chip (SCom5010) implemented in a 0.18${\mu}{\textrm}{m}$ CMOS technology.[1] ARM940T cached processor. TeakLite DSP core, and other peripheral blocks are integrated with the baseband modem chip. Also we show novel verification methodologies and explain how this chip can be used as an emulation processor.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1428-1431
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• 2002

It is general opinion that the future mobile multimedia networks will use different standards and a prospective solution to this problem will be software defined radio (SDR) techniques. SDR provides the flexibility to support multiple air interfaces and signal processing functions at the same time. Especially, digital signal processors and FPGAs are widely used for implementation of these adaptive and flexible functions of a baseband modem for SDR applications. Also, it is known that the modulation schemes of OCQPSK (Orthogonal Complex QPSK) and HPSK (Hybrid PSK) are used for IMT-2000 services of cdma2000 and WCDMA, respectively. Thus, in this paper, we design and implement an OCQPSK / HPSK modem using a DSP chip of Texas Instrument's TMS320C6701. One modulation scheme is operated by adaptive selection between the two schemes and 5 physical traffic channels differentiated by orthogonal codes are implemented in one DSP chip and each channel has 1Mbps data rates and 8Mcps chip rates.