• Title/Summary/Keyword: DMOSFET

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High-Performance Metal-Substrate Power Module for Electrical Applications

  • Kim, Jongdae;Oh, Jimin;Yang, Yilsuk
    • ETRI Journal
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    • v.38 no.4
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    • pp.645-653
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    • 2016
  • This paper demonstrates the performance of a metal-substrate power module with multiple fabricated chips for a high current electrical application, and evaluates the proposed module using a 1.5-kW sinusoidal brushless direct current (BLDC) motor. Specifically, the power module has a hybrid structure employing a single-layer heat-sink extensible metal board (Al board). A fabricated motor driver IC and trench gate DMOSFET (TDMOSFET) are implemented on the Al board, and the proper heat-sink size was designed under the operating conditions. The fabricated motor driver IC mainly operates as a speed controller under various load conditions, and as a multi-phase gate driver using an N-ch silicon MOSFET high-side drive scheme. A fabricated power TDMOSFET is also included in the fabricated power module for three-phase inverter operation. Using this proposed module, a BLDC motor is operated and evaluated under various pulse load tests, and our module is compared with a commercial MOSFET module in terms of the system efficiency and input current.

A Novel Process for Fabricating High Density Trench MOSFETs for DC-DC Converters

  • Kim, Jong-Dae;Roh, Tae-Moon;Kim, Sang-Gi;Park, Il-Yong;Yang, Yil-Sulk;Lee, Dae-Woo;Koo, Jin-Gun;Cho, Kyoung-Ik;Kang, Young-Il
    • ETRI Journal
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    • v.24 no.5
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    • pp.333-340
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    • 2002
  • We propose a new process technique for fabricating very high-density trench MOSFETs using 3 mask layers with oxide spacers and a self-aligned technique. This technique reduces the device size in trench width, source, and p-body region with a resulting increase in cell density and current driving capability as well as cost-effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3-2.4 ${\mu}m$ was 100 Mcell/$in^2$ and a specific on-resistance of 0.41 $m{\Omega}{\cdot}cm^2$ was obtained under a blocking voltage of 43 V.

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High-Current Trench Gate DMOSFET Incorporating Current Sensing FET for Motor Driver Applications

  • Kim, Sang-Gi;Won, Jong-Il;Koo, Jin-Gun;Yang, Yil-Suk;Park, Jong-Moon;Park, Hoon-Soo;Chai, Sang-Hoon
    • Transactions on Electrical and Electronic Materials
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    • v.17 no.5
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    • pp.302-305
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    • 2016
  • In this paper, a low on-resistance and high current driving capability trench gate power metal-oxide-semiconductor field-effect transistor (MOSFET) incorporating a current sensing feature is proposed and evaluated. In order to realize higher cell density, higher current driving capability, cost-effective production, and higher reliability, self-aligned trench etching and hydrogen annealing techniques are developed. While maintaining low threshold voltage and simultaneously improving gate oxide integrity, the double-layer gate oxide technology was adapted. The trench gate power MOSFET was designed with a 0.6 μm trench width and 3.0 μm cell pitch. The evaluated on-resistance and breakdown voltage of the device were less than 24 mΩ and 105 V, respectively. The measured sensing ratio was approximately 70:1. Sensing ratio variations depending on the gate applied voltage of 4 V ~ 10 V were less than 5.6%.

Electrical Characteristics of 600V Trench Gate Lateral DMOSFET Structure for Intelligent Power IC System (600V급 트렌치 게이트 LDMOSFET의 전기적 특성에 대한 연구)

  • Lee, Han-Sin;Kang, Ey-Goo;Shin, A-Ram;Shin, Ho-Hyun;Sung, Man-Young
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1406-1407
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    • 2006
  • 본 논문에서는 기존의 250V급 트렌치 전극형 파워 MOSFET을 구조적으로 개선하여, 600V 이상의 순방향 항복 전압을 갖는 파워 MOSFET을 설계 하였다. 본 논문에서 제안한 구조로 기존의 250V급 트렌치 전극형 파워 MOSFET에 비하여 더욱 높은 순방향 항복 전압을 얻었다. 또한, 기존의 LDMOS 구조로 500V 이상의 항복 전압을 얻기 위해서 $100{\mu}m$ 이상의 크기를 필요로 했던 반면에, 본 논문에서 제안한 소자의 크기(vertical 크기)는 $50{\mu}m$로서, 소자의 소형화 및 고효율화 측면에서 더욱 우수한 특성을 얻었다. 본 논문은 2-D 공정시뮬레이터 및 소자 시뮬레이터를 바탕으로, 트렌치 옥사이드의 두께 및 폭, 에피층의 두께 변화 등의 설계변수와 이온주입 도즈 및 열처리 시간에 따른 공정변수에 대한 시뮬레이션을 수행하여, 본 논문에서 제안한 구조가 타당함을 입증하였다.

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The Electrical Properties of Post-Annealing in Neutron-Irradiated 4H-SiC MOSFETs (중성자 조사한 4H-SiC MOSFET의 열처리에 의한 전기적 특성 변화)

  • Lee, Taeseop;An, Jae-In;Kim, So-Mang;Park, Sung-Joon;Cho, Seulki;Choo, Kee-Nam;Cho, Man-Soon;Koo, Sang-Mo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.4
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    • pp.198-202
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    • 2018
  • In this work, we have investigated the effect of a 30-min thermal anneal at $550^{\circ}C$ on the electrical characteristics of neutron-irradiated 4H-SiC MOSFETs. Thermal annealing can recover the on/off characteristics of neutron-irradiated 4H-SiC MOSFETs. After thermal annealing, the interface-trap density decreased and the effective mobility increased in terms of the on-characteristics. This finding could be due to the improvement of the interfacial state from thermal annealing and the reduction in Coulomb scattering due to the reduction in interface traps. Additionally, in terms of the off-characteristics, the thermal annealing resulted in the recovery of the breakdown voltage and leakage current. After the thermal annealing, the number of positive trapped charges at the MOSFET interface was decreased.