• Proceedings of the Korea Technology Innovation Society Conference
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• 2003.11a
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• pp.185-205
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• 2003

• Journal of the Korea Society of Computer and Information
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• v.4 no.1
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• pp.7-14
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• 1999

In this paper, we deals with operator allocation and binding in high-level synthesis. We proposed a new methode to allocation and bind for scheduled operations on each control step after scheduling. Especially, we take account ILP formulation in order to get optimal allocation and binding result. Experiment was done on the HAL DFG model of Differential Equation, to show it's effectiveness.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.10
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• pp.67-76
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• 1993

This paper presents the design and implementation of SVSIM (Sogang VHDL SIMulator), a multi-level VHDL simulator, designed for the construction of an integrated VGDL design environment. The internal model of SVSIM is the hierarchical C/DFG which is extended from C/DFG to include the network hierarchy and local/glabal control informations. Hierarchical network is not flattened for simulation, resulting in the reduction of space complexity. The predufined/user-defined types except for the record type and the predefined/user-defined attributes are supported in SVSIM. Algorithmic-level descriptions can be siumlated by the support of recursive procedure/function calls. Input stimuli can be generated by command script in stimuli file or in VHDL source code. Experimential results show SVSIM can be efficiently used for the simulation of the pure behavioral descriptions, structural descriptions or mixture of these.

• The Transactions of the Korea Information Processing Society
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• v.4 no.10
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• pp.2571-2580
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• 1997

In this paper, we deal with the resource constrain scheduling to execute behavior algorithm under resource limit. Expecially, we proposed a scheduling algorithm, called delayed scheduling, which finds the lower bound control step to assign operation under resource limit. We take in account the actual scheduling problems including multicycle operation and functional pipelining. Integer Linear Programing formulations are used to the scheduling problems in order to get optimal scheduling result. Experiment was done on the DFG model of fifth-order digital wave filter, to show it's effectiveness.

• Bulletin of the Korean Chemical Society
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• v.35 no.8
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• pp.2494-2504
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• 2014

P38 mitogen activated protein (MAP) kinase is an important anti-inflammatory drug target, which can be activated by responding to various stimuli such as stress and immune response. Based on the conformation of the conserved DFG loop (in or out), binding inhibitors are termed as type-I and II. Type-I inhibitors are ATP competitive, whereas type-II inhibitors bind in DFG-out conformation of allosteric pocket. It remains unclear that how these allosteric inhibitors stabilize the DFG-out conformation and interact. Organosilicon compounds provide unusual opportunity to enhance potency and diversity of drug molecules due to their low toxicity. However, very few examples have been reported to utilize this property. In this regard, we performed docking of an inhibitor (BIRB) and its silicon analog (Si-BIRB) in an allosteric binding pocket of p38. Further, molecular dynamics (MD) simulations were performed to study the dynamic behavior of the simulated complexes. The difference in the biological activity and mechanism of action of the simulated inhibitors could be explained based on the molecular mechanics/generalized Born surface area (MM/GBSA) binding free energy per residue decomposition. MM/GBSA showed that biological activities were related with calculated binding free energy of inhibitors. Analyses of the per-residue decomposed energy indicated that van der Waals and non-polar interactions were predominant in the ligand-protein interactions. Further, crucial residues identified for hydrogen bond, salt bridge and hydrophobic interactions were Tyr35, Lys53, Glu71, Leu74, Leu75, Ile84, Met109, Leu167, Asp168 and Phe169. Our results indicate that stronger hydrophobic interaction of Si-BIRB with the binding site residues could be responsible for its greater binding affinity compared with BIRB.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.5
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• pp.232-242
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• 2005

This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in BFG represents a coarse grain block such as FIR and DCT and a port in a block may consume multiple data samples per invocation, which distinguishes our approach from behavioral synthesis and complicates the problem. In the presented design methodology, a dataflow graph with specified algorithm can be mapped to various hardware structures according to the resource allocation and schedule information. This simplifies the management of the area/performance tradeoff in hardware design and widens the design space of hardware implementation of a dataflow graph compared with the previous approaches. Through experiments with some examples, the usefulness of the proposed technique is demonstrated.

• Journal of the Optical Society of Korea
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• v.19 no.3
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• pp.297-302
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• 2015

Terahertz (THz) wave generation from bulk and periodically poled $LiTaO_3$ (PPLT) with a Cherenkov phase matching scheme is numerically investigated. It is shown that by using the crystal birefringence of bulk $LiTaO_3$ and a grating vector of PPLT, THz waves can be efficiently generated by difference frequency generation (DFG) with a Cherenkov phase matching scheme. The frequency tuning characteristics of the THz wave via varying wavelength of difference frequency waves, phase matching angle, poling period of PPLT and working temperature are theoretically analyzed. The parametric gain coefficient in the low-loss limit and the absorption coefficient of the THz wave during the DFG process in the vicinity of polariton resonances are numerically analyzed. A THz wave can be efficiently generated by utilizing the giant second order nonlinearities of $LiTaO_3$ in the vicinity of polariton resonances.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.188-191
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• 2000

This paper presents a register scheduling and allocation algorithm for high level synthesis. The proposed algorithm executes the low power scheduling to reduce the switching activity using shut down technique which was not unnecessary the calculation through the extraction DFG from VHDL description. Also, the register allocation algorithm determines the minimum register after the life time analysis of all variable. It is minimum the switching activity using graph coloring technique for low power consumption. The proposed algorithm proves the effect through various filter benchmark to adopt a new scheduling and allocation algorithm considering the low power.

• Proceedings of the Optical Society of Korea Conference
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• 2003.02a
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• pp.204-205
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• 2003

미량기체의 흡수스펙트럼을 높은 감도로 측정하는 공동 광자감쇠 분광법(cavity ringdown spectroscopy； CRDS)을 나노초 레이저 펄스의 차주파수 생성(difference-frequency generation； DFG)을 광원으로 이용하여 파장 3 ~ 4 $\mu\textrm{m}$ 영역에서 구현하였다. CRDS는 고반사율 거울로 이루어진 광학적 공동에 단일 파장의 빛을 가두었다가 그 에너지의 시간적 감소율을 측정하여 공동 속 기체의 흡수율을 알아내는 방법이다. (중략)

• The Transactions of the Korea Information Processing Society
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• v.6 no.8
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• pp.2196-2203
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• 1999

This paper describes the bus scheduling problem and register optimization method in datapath synthesis. Scheduling is process of operation allocation to control steps in order to minimize the cost function under the given circumstances. For that purpose, we propose some formulations to minimize the cost function for bus assignment to get an optimal and minimal cost function in hardware allocations. Especially, bus and register minimization technique are fully considered which are the essential topics in hardware allocation. Register scheduling is done after the operation and bus scheduling. Experiments are done with the DFG model of fifth-order digital ware filter to show its effectiveness. Structural integer programming formulations are used to solve the scheduling problems in order to get the optimal scheduling results in the integer linear programming environment.