• Title/Summary/Keyword: DC-link neutral-point voltage balance

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A Simple Control Strategy for Balancing the DC-link Voltage of Neutral-Point-Clamped Inverter at Low Modulation Index

  • C.S. Ma;Kim, T.J.;D.W. Kang;D.S. Hyun
    • Journal of Power Electronics
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    • v.3 no.4
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    • pp.205-214
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    • 2003
  • This paper proposes a simple control strategy based on the discontinuous PWM (DPWM) to balance the DC-link voltage of three-level neutral-point-clamped (NPC) inverter at low modulation index. It introduces new DPWM methods in multi-level inverter and one of them is used for balancing the DC-link voltage. The current flowing in the neutral point of the DC-link causes the fluctuation of the DC-link voltage of the NPC inverter. The proposed DPWM method changes the path and duration time of the neutral point current, which makes the overall fluctuation of the DC-link voltage zero during a sampling time of the reference voltage vector. Therefore, by using the proposed strategy, the voltage of the DC-link can be balanced fairly well and the voltage ripple of the DC-link is also reduced significantly. Moreover, comparing with conventional methods which have to perform the complicated calculation, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by the experiment.

Research on Carried-Based PWM with Zero-Sequence Component Injection for Vienna Type Rectifiers

  • Ma, Hui;Feng, Mao;Tian, Yu;Chen, Xi
    • Journal of Power Electronics
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    • v.19 no.2
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    • pp.560-568
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    • 2019
  • This paper studies the inherent relationship between currents and zero-sequence components. Then a precise algorithm is proposed to calculate the injected zero-sequence component to control the DC-Link neutral-point voltage balance, which can result in a more efficient and flexible neutral point voltage balance with a desirable performance. In addition, it is shown that carried-based PWM with the calculated zero-sequence component scheme can be equivalent to space-vector pulse-width modulation (SVPWM). Based on the proposed method, the optimal zero-sequence component of the feasible modulation indices is analyzed. In addition, the unbalanced load limitation of the DC-Link neutral-point voltage balance control is also revealed. Simulation and experimental results are shown to verify the validity and practicality of the proposed algorithm.

DC-Link Voltage Balance Control Using Fourth-Phase for 3-Phase 3-Level NPC PWM Converters with Common-Mode Voltage Reduction Technique

  • Jung, Jun-Hyung;Park, Jung-Hoon;Kim, Jang-Mok;Son, Yung-Deug
    • Journal of Power Electronics
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    • v.19 no.1
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    • pp.108-118
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    • 2019
  • This paper proposes a DC-link voltage balance controller using the fourth-phase of a three-level neutral-point clamped (NPC) PWM converter with medium vector selection (MVS) PWM for common-mode voltage reduction. MVS PWM makes the voltage reference by synthesizing the voltage vectors that cannot generate common-mode voltage. This PWM method is effective for reducing the EMI noise emitted from converter systems. However, the DC-link voltage imbalance problem is caused by the use of limited voltage vectors. Therefore, in this paper, the effect of MVS PWM on the DC-link voltage of a three-level NPC converter is analyzed. Then a proportional-derivative (PD) controller for the DC-link voltage balance is designed from the DC-link modeling. In addition, feedforward compensation of the neutral point current is included in the proposed PD controller. The effectiveness of the proposed controller is verified by experimental results.

A Simple Control Strategy for Balancing the DC-link Voltage of Neutral-Point-Clamped Inverters at low modulation index (Neutral-Point-Clamped 인버터의 저 변조지수에서 DC 링크 전압 균형을 위한 간단한 컨트롤 기법)

  • Ma C.S.;Kim T.J.;Kang D.W.;Hyun D.S.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.560-564
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    • 2003
  • This paper proposes a simple control strategy based on the discontinuous PWM(DPWM) to balance the DC-link voltage of three-level Neutral-Point-Clamped(WPC) inverters at low modulation index. New DPWM methods in multi-level inverter are also introduced. The proposed DPWM method changes the path and duration to flow the neutral point current out of or into neutral point of the DC-link and it makes the overall fluctuation of the DC-link voltage zero during a sampling time of reference voltage vector. Therefore, the voltage of the DC-link can be balanced fairly well and also the voltage ripple of the DC-link is reduced significantly. Moreover, comparing with conventional methods, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by experiment

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Active Voltage-balancing Control Methods for the Floating Capacitors and DC-link Capacitors of Five-level Active Neutral-Point-Clamped Converter

  • Li, Junjie;Jiang, Jianguo
    • Journal of Power Electronics
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    • v.17 no.3
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    • pp.653-663
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    • 2017
  • Multilevel active neutral-point-clamped (ANPC) converter combines the advantages of three-level ANPC converter and multilevel flying capacitor (FC) converter. However, multilevel ANPC converter often suffers from capacitor voltage balancing problems. In order to solve the capacitor voltage balancing problems for five-level ANPC converter, phase-shifted pulse width modulation (PS-PWM) is used, which generally provides natural voltage balancing ability. However, the natural voltage balancing ability depends on the load conditions and converter parameters. In order to eliminate voltage deviations under steady-state and dynamic conditions, the active voltage-balancing control (AVBC) methods of floating capacitors and dc-link capacitors based on PS-PWM are proposed. First, the neutral-point current is regulated to balance the neutral-point voltage by injecting zero-sequence voltage. After that, the duty cycles of the redundant switch combinations are adjusted to balance the floating-capacitor voltages by introducing moderating variables for each of the phases. Finally, the effectiveness of the proposed AVBC methods is verified by experimental results.

A study on neutral-point voltage balance with harmonic component injection for single phase three-level NPC converter (고조파 주입을 통한 단상 3레벨 NPC 컨버터 중성점 전압 밸런싱 연구)

  • Kang, Kyoung Pil;Kim, Ho-Sung;Cho, Jintae;Cho, Younghoon
    • Proceedings of the KIPE Conference
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    • 2018.07a
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    • pp.316-317
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    • 2018
  • This paper propse the DC link capacitor voltage balancing control for three level neutral point clamped converter with harmonic component injection method. The injcetion voltage consists of harmonic component and DC link capacitor voltage difference. Theoretical analysis is provided to balance the DC link voltage, and it shows that harmonic component compensates the unbalanced condition between the capacitors. Both simulations and experiments are carried out to show that the voltage unbalance have been decreased by the proposed method.

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Three-Phase Four-Wire Inverter Topology with Neutral Point Voltage Stable Module for Unbalanced Load Inhibition

  • Cai, Chunwei;An, Pufeng;Guo, Yuxing;Meng, Fangang
    • Journal of Power Electronics
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    • v.18 no.5
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    • pp.1315-1324
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    • 2018
  • A novel three-phase four-wire inverter topology is presented in this paper. This topology is equipped with a special capacitor balance grid without magnetic saturation. In response to unbalanced load and unequal split DC-link capacitors problems, a qusi-full-bridge DC/DC topology is applied in the balance grid. By using a high-frequency transformer, the energy transfer within the two split dc-link capacitors is realized. The novel topology makes the voltage across two split dc-link capacitors balanced so that the neutral point voltage ripple is inhibited. Under the condition of a stable neutral point voltage, the three-phase four-wire inverter can be equivalent to three independent single phase inverters. As a result, the three-phase inverter can produce symmetrical voltage waves with an unbalanced load. To avoid forward transformer magnetic saturation, the voltages of the primary and secondary windings are controlled to reverse once during each switching period. Furthermore, an improved mode chosen operating principle for this novel topology is designed and analyzed in detail. The simulated results verified the feasibility of this topology and an experimental inverter has been built to test the power quality produced by this topology. Finally, simulation results verify that the novel topology can effectively improve the inhibition of an inverter with a three-phase unbalanced load while decreasing the value of the split capacitor.

DC-Link Capacitor Voltage Balanced Modulation Strategy Based on Three-Level Neutral-Point-Clamped Cascaded Rectifiers

  • Han, Pengcheng;He, Xiaoqiong;Zhao, Zhiqin;Yu, Haolun;Wang, Yi;Peng, Xu;Shu, Zeliang
    • Journal of Power Electronics
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    • v.19 no.1
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    • pp.99-107
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    • 2019
  • This study proposes a new modulation strategy to deal with unbalanced output voltage that is based on three-level neutral-point-clamped cascaded rectifiers. The fundament idea is to reallocate the value of the voltage levels generated by each of the modules on the basis of space vector pulse width modulation. This proposed modulation strategy can reduce the switching frequency while maintaining the mutual-module voltage balance. First, an analysis of unbalanced output voltage is reflected. Then a new modulation strategy is introduced in detail. Internal module capacitor voltages are balanced by the selection of redundant vectors. Moreover, the voltage balance ability is calculated. Finally, the feasibility of this modulation strategy is verified through experimental results.

Simplified PWM Strategy for Neutral-Point-Clamped (NPC) Three-Level Converter

  • Ye, Zongbin;Xu, Yiming;Li, Fei;Deng, Xianming;Zhang, Yuanzheng
    • Journal of Power Electronics
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    • v.14 no.3
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    • pp.519-530
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    • 2014
  • A novel simplified pulse width modulation(PWM) strategy for neutral point clamped (NPC) three-level converter is proposed in this paper.The direct output voltage modulation is applied to reduce the calculation time. Based on this strategy, several optimized control methods are proposed. The neutral point potential balancing algorithm is discussed and a fine neutral point potential balancing scheme is introduced. Moreover, the minimum pulse width compensation and switching losses reduction can be easily achieved using this modulation strategy. This strategy also gains good results even with the unequal DC link capacitor. The modulation principle is studied in detail and the validity of this simplified PWM strategy is experimentally verified in this paper. The experiment results indicated that the proposed PWM strategy has excellent performance, and the neutral point potential can be balanced well with unequal DC link captaincies.

Fast Voltage-Balancing Scheme for a Carrier-Based Modulation in Three-Phase and Single-Phase NPC Three-Level Inverters

  • Chen, Xi;Huang, Shenghua;Jiang, Dong;Li, Bingzhang
    • Journal of Electrical Engineering and Technology
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    • v.13 no.5
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    • pp.1986-1995
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    • 2018
  • In this paper, a novel neutral-point voltage balancing scheme for NPC three-level inverters using carrier-based sinusoidal pulse width modulation (SPWM) method is developed. The new modulation approach, based on the obtained expressions of zero sequence voltage in all six sectors, can significantly suppress the low-frequency voltage oscillation in the neutral point at high modulation index and achieve a fast voltage-balancing dynamic performance. The implementation of the proposed method is very simple. Another attractive feature is that the scheme can stably control any voltage difference between the two dc-link capacitors within a certain range without using any extra hardware. Furthermore, the presented scheme is also applicable to the single-phase NPC three-level inverter. It can maintain the neutral-point voltage balance at full modulation index and improve the voltage-balancing dynamic performance of the single-phase NPC three-level inverter. The performance of the proposed strategy and its benefits over other previous techniques are verified experimentally.