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http://dx.doi.org/10.6113/JPE.2019.19.1.108

DC-Link Voltage Balance Control Using Fourth-Phase for 3-Phase 3-Level NPC PWM Converters with Common-Mode Voltage Reduction Technique  

Jung, Jun-Hyung (Dept. of Electrical and Computer Eng., Pusan National University)
Park, Jung-Hoon (Dept. of Electrical and Computer Eng., Pusan National University)
Kim, Jang-Mok (Dept. of Electrical and Computer Eng., Pusan National University)
Son, Yung-Deug (Dept. of Mechanical Facility Control Eng., Korea University of Technology and Education)
Publication Information
Journal of Power Electronics / v.19, no.1, 2019 , pp. 108-118 More about this Journal
Abstract
This paper proposes a DC-link voltage balance controller using the fourth-phase of a three-level neutral-point clamped (NPC) PWM converter with medium vector selection (MVS) PWM for common-mode voltage reduction. MVS PWM makes the voltage reference by synthesizing the voltage vectors that cannot generate common-mode voltage. This PWM method is effective for reducing the EMI noise emitted from converter systems. However, the DC-link voltage imbalance problem is caused by the use of limited voltage vectors. Therefore, in this paper, the effect of MVS PWM on the DC-link voltage of a three-level NPC converter is analyzed. Then a proportional-derivative (PD) controller for the DC-link voltage balance is designed from the DC-link modeling. In addition, feedforward compensation of the neutral point current is included in the proposed PD controller. The effectiveness of the proposed controller is verified by experimental results.
Keywords
Common-mode voltage reduction; DC-link voltage balancing control; Three-level NPC converter;
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1 S. Kouro, M. Malinowski, K. Gopakumar. J. Pou, L. G. Franquelo, B. Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,” IEEE Trans. Ind. Electron., Vol. 57, No. 8, pp. 2553-2580, Aug. 2010.   DOI
2 S. De, D. Banerjee, K. S. kumar, K. Gopakumer, R. Ramchand, and C. Patel, “Multilevel inverters for lowpower application,” IET Power Electron., Vol. 4, No. 4, pp. 382-392, Jun. 2010.
3 G. Skibinski, R. Kerkman, and D. Schlegel, “Emi emissions of modern pwm ac drives,” IEEE Ind. Appl. Mag., Vol. 5, No. 6, pp. 47-80, Nov. 1999.   DOI
4 H.-J. Kim, H.-D. Lee, and S.-K. Sul, “A new PWM strategy for common-mode voltage reduction in neutral-pointclamped inverter-fed AC motor drives,” IEEE Trans. Ind. Appl., Vol. 37, No. 6, pp. 1840-1845, Nov/Dec. 2001.   DOI
5 S.-J. Chee, S. Ko, H.-S. Kim, and S.-K. Sul, “Commonmode voltage reduction of three-level four-leg PWM converter,” IEEE Trans. Ind. Appl., Vol. 51, No. 5, pp. 4006-4016, Sep/Oct. 2015.   DOI
6 S. Ogasawara, H. Ayano, and H. Akagi, “Measurement and reduction of EMI radiated by a PWM inverter-fed AC motor drive systems,” IEEE Trans. Ind. Appl., Vol. 33, No. 4, pp. 1019-1026, Jul./Aug. 1997.   DOI
7 S. Ogasawara, H. Ayano, and H. Akagi, “An active circuit for cancellation of common-mode voltage generated by a PWM inverter,” IEEE Trans. Power Electron., Vol. 13, No. 5, pp. 835-841, Sep. 1998.   DOI
8 H.Alawieh, K. Arab Tehrani, and Y.Azzouz, "A new active common-mode voltage elimination method for three-level neutral-point clamped inverters," IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society, 2014.
9 H. Zhang, A. V. Jouanne, S. Dai, A. K. Wallace, and F. Wang, “Multilevel inverter modulation schemes to eliminate common-mode voltages,” IEEE Trans. Ind. Appl., Vol. 36, No. 6, pp. 1645-1653, Nov./Dec. 2000.   DOI
10 T. K. T. Nguyen, N. V. Nguyen, and N. R. Prasad, “Novel eliminated common-mode voltage pwm sequences and an online algorithm to reduce current ripple for a three-level inverter,” IEEE Trans. Power Electron., Vol. 32, No. 10, pp. 7482-7493, Oct. 2017.   DOI
11 R. M. Cuzner, A. R. Bendre, P. J. Faill, and B. Semenov, “Implementation of a four-pole dead-time-compensated neutral-point-clamped three-phase inverter with low common-mode voltage output,” IEEE. Trans. Ind. Appl., Vol. 45, No. 2, pp. 816-826, Mar./Apr. 2009.   DOI
12 S. Ceballos, J. Pou, J. Zaragoza, E. Robles, J. L. Villate, and J. L. Martin, “Fault-tolerant neutral-point-clamped converter solutions based on including a fourth resonant leg,” IEEE Trans. Ind. Electron., Vol. 58, No. 6, pp. 2293-2303, Jun. 2011.   DOI
13 T. S. Win, Y. Baba, M. Okamoto, E. Hiraki, and T. Tanaka, "A half-bridge inverter based Active Power Quality Compensator with a DC voltage balancer for electrified railways," 2011 IEEE Ninth International Conference on Power Electronics and Drive Systems, pp. 185-190, 2011.
14 A. Nabae, I. Takahashi, and H. Akagi "A new neutralpoint-clamped PWM inverter," IEEE. Trans. Ind. Appl., Vol. IA-17, No. 5, pp. 518-523, Sep./Oct. 1981.   DOI
15 W. Chen, Y. Zou, and L. Xu, "Direct power control for neutral-point-clamped three-level pwm rectifier," in 2008 IEEE International Conference on Industrial Technology, pp. 1-6, Apr. 2008.
16 A. Bendre, S. Krstic, J. C. Vandermeer, and G. Venkataramanan, “Comparative evaluation of modulation algorithms for neutral-point-clamped converters,” IEEE Trans. Ind. Appl., Vol. 41, No. 2, pp. 634-643, Mar./Apr. 2005.   DOI
17 D. Zhou, "A self-balancing space vector switching modulator for three-level motor drives," IEEE Power Electronics Specialist Conference (PESC), pp. 1369-1374, 2001.
18 H. K. Ku, W. S. Im, J. M. Kim, and Y. S. Suh, "Fault detection and tolerant control of 3-phase NPC active rectifier," 2012 IEEE Energy Conversion Congress and Exposition (ECCE), pp. 4519-4524, 2012.
19 J. H. Jung, H. K. Ku, W. S. Im, and J. M. Kim, "A PWM control strategy for low-speed operation of three-level NPC inverter based on bootstrap gate drive circuit," 2014 IEEE Applied Power Electronics Conference and Exposition (APEC), pp. 297-302, 2014.
20 Y. Shrivastava, C. K. Lee, S.Y.R. Hui, and H. S. H. Chung, "Comparison of RPWM and PWM space vector switching schemes for 3-level power inverters," IEEE Power Electronics Specialist Conference, pp. 138-145, 2001.
21 A. S. Andrade, A. M. Maciel, L. de M. Barros, M. A. do N. Vieira, and R. P. R. de Sousa, "A control technique to balnace the voltage of DC-link for three-level NPC converter," 2017 Brazilian Power Electronics Conference (COBEP), 2017.
22 G. Zhongnan, C. Xiuhui, L. Pengcheng, and Z. Chunjiang, "A new balance control method of three-level converter NPP," 2016 IEEE 8th IPEMC-ECCE Asia, 2016.
23 H. Kitidetm and Y. Kumsuwan, "A CB-SVPWM control strategy for neutral-point voltage balancing in three-level NPC inverters," TENCON 2017 - 2017 IEEE Region 10 Conference, 2017.
24 F. Umbra, F. Gordillo, F. Salas, and S. Vazquez. "Voltages balance control in three phase three-level npc rectifiers." in 2010 IEEE International Symposium on Industrial Electronics, pp. 3018-3023, 2010.
25 J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multilevel voltage-source-converter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., Vol. 54, No. 6, pp. 2930-2945, Dec. 2007.   DOI
26 A. Choudhury, P. Pillay, and S. S. Williamson, "Modified DC-link voltage balancing algorithm for a 3-level neutral point clamped (NPC) traction inverter based electric vehicle PMSM drive," IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society, 2013.
27 Y. Jiao, F. C. Lee, and S. Lu, "Space vector modulation for 3-level NPC converter with neutral voltage balancing and switching loss/noise reduction ," 2014 IEEE Applied Power Electronics Conference and Exposition - APEC, 2014.
28 J.-W. Jung, H. H. Choi, and T.-H. Kim, “Fuzzy PD speed controller for permanent magnet synchronous motors,” J. Power Electron., Vol. 11, No. 6, pp. 819-823, Nov. 2011.   DOI
29 V. Badri and M. S. Tavazoei, “Achievable performance region for a fractional-order proportional and derivative motion controller,” IEEE Trans. Ind. Electron., Vol. 62, No. 11, pp. 7171-7180, Nov. 2015.   DOI