• Title/Summary/Keyword: DC-DC converter with digital control

Search Result 114, Processing Time 0.024 seconds

Unbounded Binary Search Method for Fast-tracking Maximum Power Point of Photovoltaic Modules

  • Hong, Yohan;Kim, Yong Sin;Baek, Kwang-Hyun
    • IEIE Transactions on Smart Processing and Computing
    • /
    • v.5 no.6
    • /
    • pp.454-461
    • /
    • 2016
  • A maximum power point tracking (MPPT) system with fast-tracked time and high power efficiency is presented in this paper. The proposed MPPT system uses an unbounded binary search (UBS) algorithm that continuously tracks the maximum power point (MPP) with a binary system to follow the MPP under rapid-weather-change conditions. The proposed algorithm can decide the correct direction of the MPPT system while comparing the previous power point with the present power point. And then, by fixing the MPP until finding the next MPP, there is no oscillation of voltage MPP, which maximizes the overall power efficiency of the photovoltaic module. With these advantages, this proposed UBS is able to detect the MPP more effectively. This MPPT system is based on a boost converter with a micro-control unit to control analog-to-digital converters and pulse width modulation. Analysis of this work and experimental results show that the proposed UBS MPPT provides fast, accurate tracking with no oscillation in situations where weather rapidly changes and shadow is caused by all sorts of things. The tracking time is reduced by 87.3% and 66.1% under dynamic-state and steady-state operation, respectively, as compared with the conventional 7-bit perturb and observe technique.

An Active Damping Device for a Distributed Power System (전력시스템을 위한 Active Damping Device)

  • La, Jae-Du
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.58 no.2
    • /
    • pp.116-121
    • /
    • 2009
  • Distributed power systems (DPSs) has been widely used various industrial/military applications due to their various advantages. Furthermore, the "All electric" concept, in conjunction with DC DPS, appears to be more advanced and mature in the AEV(All-Electric Vehicular) industry. Generally, AEV carry many loads with varied functions. However, there may be large pulsed loads with short duty ratios which can affect the normal operation of other loads. In this paper, a converter with spilt capacitors and a simple adaptive controller is proposed as a active damping device to mitigate the voltage transients on the bus. The proposed converter allows the smaller capacitive storage. In addition, the proposed control approach has the advantage of requiring only one sensor and performing both the functions of mitigating the voltage bus transients and maintaining the level of energy stored. The control algorithm has been implemented on a TMS320F2812 Digital Signal Processor (DSP). Simulation and experimental results are presented which verify the proposed control principle and demonstrate the practicality of the circuit topology.

Selective Harmonic Elimination in Multi-level Inverters with Series-Connected Transformers with Equal Power Ratings

  • Moussa, Mona Fouad;Dessouky, Yasser Gaber
    • Journal of Power Electronics
    • /
    • v.16 no.2
    • /
    • pp.464-472
    • /
    • 2016
  • This study applies the selective harmonic elimination (SHE) technique to design and operate a regulated AC/DC/AC power supply suitable for maritime military applications and underground trains. The input is a single 50/60 Hz AC voltage, and the output is a 400 Hz regulated voltage. The switching angles for a multi-level inverter and transformer turns ratio are determined to operate with special connected transformers with equal power ratings and produce an almost sinusoidal current. As a result of its capability of directly controlling harmonics, the SHE technique is applicable to apparatus with congenital immunity to specific harmonics, such as series-connected transformers, which are specially designed to equally share the total load power. In the present work, a single-phase 50/60 Hz input source is rectified via a semi-controlled bridge rectifier to control DC voltage levels and thereby regulate the output load voltage at a constant level. The DC-rectified voltage then supplies six single-phase quazi-square H-bridge inverters, each of which supplies the primary of a single-phase transformer. The secondaries of the six transformers are connected in series. Through off-line calculation, the switching angles of the six inverters and the turns ratios of the six transformers are designed to ensure equal power distribution for the transformers. The SHE technique is also employed to eliminate the higher-order harmonics of the output voltage. A digital implementation is carried out to determine the switching angles. Theoretical results are demonstrated, and a scaled-down experimental 600 VA prototype is built to verify the validity of the proposed system.

Fast-Transient Digital LDO Regulator With Binary-Weighted Current Control (이진 가중치 전류 제어 기법을 이용한 고속 응답 디지털 LDO 레귤레이터)

  • Woo, Ki-Chan;Sim, Jae-Hyeon;Kim, Tae-Woo;Hwang, Seon-Kwang;Yang, Byung-Do
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.20 no.6
    • /
    • pp.1154-1162
    • /
    • 2016
  • This paper proposes a fast-transient digital LDO(Low dropout) regulator with binary-weighted current control technique. Conventional digital LDO takes a long time to stabilize the output voltage, because it controls the amount of current step by step, thus ringing problem is generated. Binary-weighted current control technique rapidly stabilizes output voltage by removing the ringing problem. When output voltage reliably reaches the target voltage, It added the FRZ mode(Freeze) to stop the operation of digital LDO. The proposed fast response digital LDO is used with a slow response DC-DC converter in the system which rapidly changes output voltage. The proposed digital controller circuit area was reduced by 56% compared to conventional bidirectional shift register, and the ripple voltage was reduced by 87%. A chip was implemented with a $0.18{\mu}F$ CMOS process. The settling time is $3.1{\mu}F$ and the voltage ripple is 6.2mV when $1{\mu}F$ output capacitor is used.

Real-Time Implementation of Shunt Active Filter P-Q Control Strategy for Mitigation of Harmonics with Different Fuzzy M.F.s

  • Mikkili, Suresh;Panda, Anup Kumar
    • Journal of Power Electronics
    • /
    • v.12 no.5
    • /
    • pp.821-829
    • /
    • 2012
  • This research article presents a novel approach based on an instantaneous active and reactive power component (p-q) theory for generating reference currents for shunt active filter (SHAF). Three-phase reference current waveforms generated by proposed scheme are tracked by the three-phase voltage source converter in a hysteresis band control scheme. The performance of the SHAF using the p-q control strategy has been evaluated under various source conditions. The performance of the proposed control strategy has been evaluated in terms of harmonic mitigation and DC link voltage regulation. In order to maintain DC link voltage constant and to generate the compensating reference currents, we have developed Fuzzy logic controller with different (Trapezoidal, Triangular and Gaussian) fuzzy M.F.s. The proposed SHAF with different fuzzy M.F.s is able to eliminate the uncertainty in the system and SHAF gains outstanding compensation abilities. The detailed simulation results using MATLAB/SIMULINK software are presented to support the feasibility of proposed control strategy. To validate the proposed approach, the system is also implemented on a real time digital simulator and adequate results are reported for its verifications.

Load and Capacitor Stacking Topologies for DC-DC Step Down Conversion

  • Mace, Jules;Noh, Gwangyol;Jeon, Yongjin;Ha, Jung-Ik
    • Journal of Power Electronics
    • /
    • v.19 no.6
    • /
    • pp.1449-1457
    • /
    • 2019
  • This paper presents two voltage domain stacking topologies for powering integrated digital loads such as multiprocessors or 3D integrated circuits. Pairs of loads and capacitors are connected in series to form a stack of voltage domains. The voltage is balanced by switching the position of the capacitors in one case and the position of the loads in the other case. This method makes the voltage regulation robust to large differential load power consumption. The first configuration can be named the load stacking topology. The second configuration can be named the capacitor stacking topology. This paper aims at proposing and comparing these two topologies. Models of both topologies and a switching scheme are presented. The behavior, control scheme, losses and overall performance are analyzed and compared theoretically in simulation and experiments. Experimental results show that the capacitor stacking topology has better performance with a 30% voltage ripple reduction.

Comparative Study between Two and Single-loop Control of Boost Converter for PVPCS (태양광용 부스트 컨버터의 2중 루프 제어 및 단일 루프 제어의 특성 비교)

  • Kim, Dong-Whan;Im, Ji-Hoon;Song, Seung-Ho;Choi, Ju-Yeop;An, Jin-Ung;Lee, Sang-Chul;Lee, Dong-Ha
    • 한국태양에너지학회:학술대회논문집
    • /
    • 2012.03a
    • /
    • pp.153-159
    • /
    • 2012
  • In photovoltaic system, the characteristic of photovoltaic module such as open circuit voltage and short circuit current will be changed because of cell temperature and solar radiation. Therefore, a boost converter of the PV system connects between the output of photovoltaic system and DC link capacitor of grid connected inverter as controlling duty ratio for maximum power point tracking(MPPT). This paper shows the dynamic characteristic of the boost converter by comparing single-loop control algorithm and two-loop control algorithm using both analog and digital control. The proposed both compensation method has been verified with computer simulation and simulation results obtained demonstrate the validity of the proposed control schemes.

  • PDF

Design and Realization of a Digital PV Simulator with a Push-Pull Forward Circuit

  • Zhang, Jike;Wang, Shengtie;Wang, Zhihe;Tian, Lixin
    • Journal of Power Electronics
    • /
    • v.14 no.3
    • /
    • pp.444-457
    • /
    • 2014
  • This paper presents the design and realization of a digital PV simulator with a Push-Pull Forward (PPF) circuit based on the principle of modular hardware and configurable software. A PPF circuit is chosen as the main circuit to restrain the magnetic biasing of the core for a DC-DC converter and to reduce the spike of the turn-off voltage across every switch. Control and I/O interface based on a personal computer (PC) and multifunction data acquisition card, can conveniently achieve the data acquisition and configuration of the control algorithm and interface due to the abundant software resources of computers. In addition, the control program developed in Matlab/Simulink can conveniently construct and adjust both the models and parameters. It can also run in real-time under the external mode of Simulink by loading the modules of the Real-Time Windows Target. The mathematic models of the Push-Pull Forward circuit and the digital PV simulator are established in this paper by the state-space averaging method. The pole-zero cancellation technique is employed and then its controller parameters are systematically designed based on the performance analysis of the root loci of the closed current loop with $k_i$ and $R_L$ as variables. A fuzzy PI controller based on the Takagi-Sugeno fuzzy model is applied to regulate the controller parameters self-adaptively according to the change of $R_L$ and the operating point of the PV simulator to match the controller parameters with $R_L$. The stationary and dynamic performances of the PV simulator are tested by experiments, and the experimental results show that the PV simulator has the merits of a wide effective working range, high steady-state accuracy and good dynamic performances.

A Design of Piezo Driver IC for Auto Focus Camera System (디지털카메라의 자동초점제어를 위한 피에조 구동회로의 설계)

  • Lee, Jun-Sung
    • Journal of IKEEE
    • /
    • v.14 no.3
    • /
    • pp.190-198
    • /
    • 2010
  • This paper describes a auto focus piezo actuator driver IC for portable digital camera. The 80[V] DC voltage is generated by a DC-DC converter and supplied to power of piezo moving control circuit. The voltage of piezo actuator needs range -20[V] to 80[V] proportional to 1[Vp-p] input control voltages. The dimensions and number of external parts are minimized in order to get a smaller hardware size. IIC(Inter-IC) interface logic is designed for data interface and it makes debugging easy, test for mass productions. The power consumption is around 40[mW] with supply voltage of 3.6[V]. This device has been fabricated in a 0.6[um] double poly, triple metal 100[V] BCD MOS process and whole chip size is 1600*1500 [$um^2$].

A CMOS Readout Circuit for Uncooled Micro-Bolometer Arrays (비냉각 적외선 센서 어레이를 위한 CMOS 신호 검출회로)

  • 오태환;조영재;박희원;이승훈
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.40 no.1
    • /
    • pp.19-29
    • /
    • 2003
  • This paper proposes a CMOS readout circuit for uncooled micro-bolometer arrays adopting a four-point step calibration technique. The proposed readout circuit employing an 11b analog-to-digital converter (ADC), a 7b digital-to-analog converter (DAC), and an automatic gain control circuit (AGC) extracts minute infrared (IR) signals from the large output signals of uncooled micro-bolometer arrays including DC bias currents, inter-pixel process variations, and self-heating effects. Die area and Power consumption of the ADC are minimized with merged-capacitor switching (MCS) technique adopted. The current mirror with high linearity is proposed at the output stage of the DAC to calibrate inter-pixel process variations and self-heating effects. The prototype is fabricated on a double-poly double-metal 1.2 um CMOS process and the measured power consumption is 110 ㎽ from a 4.5 V supply. The measured differential nonlinearity (DNL) and integrat nonlinearity (INL) of the 11b ADC show $\pm$0.9 LSB and $\pm$1.8 LSB, while the DNL and INL of the 7b DAC show $\pm$0.1 LSB and $\pm$0.1 LSB.