• Journal of Advanced Navigation Technology
• /
• v.10 no.2
• /
• pp.138-144
• /
• 2006

In this paper, dual mode FET mixer for WiBro and wireless LAN(WLAN) applications has been designed in the form of dual gate FET mixer by using the cascode structure of two single gate pHEMTs. The designed dual gate mixer has been optimized to have variable conversion gain for WiBro and WLAN applications in order to save dc power consumption. The LO to RF isolation of the designed mixer is more than 20dB from 2.3GHz to 2.5GHz band. With the LO power of 0dBm and RF power of -50dBm, the mixer shows 15dB conversion gain. When RF power increases from -50dBm to -20dBm, the conversion gain decreases to -2dB from 15dB with bias change. The variable conversion gain has several advantages. It can reduce the high dynamic range requirement of AGC burden at IF stage. Also, it can save the dc power dissipation of mixer up to 90%.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.62 no.1
• /
• pp.12-17
• /
• 2013

Fault currents are expressed as a combination of harmonic components and exponentially decaying DC offset components, during the occurrence of fault in power system. The DC offset components are included, when the voltage phase angle of fault inception is closer to $0^{\circ}$ or $180^{\circ}$. The digital protection relay should be detected quickly and accurately during the faults, despite of the distortions of relaying signal by these components. It is very important to implement the robust protection algorithm, that is not affected by DC offset and harmonic components, because most relaying algorithms extract the fundamental frequency component from distorted relaying signal. So, In order to high performance in relaying, advanced DC offset removal filter is required. In this paper, a new DC offset removal filter, which is no need to preset a time constant of power system and accurately estimate the DC offset components with one cycle of data, is proposed, and compared with the other filter. In order to verify performance of the filter, we used collecting the current signals after synchronous machine modeling by ATPDraw5.7p4 software. The results of simulation, the proposed DC offset removal filter do not need any prior information, the phase delay and gain error were not occurred.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.27 no.7
• /
• pp.29-36
• /
• 2013

In this paper, a new DC offset elimination filter is proposed for an accurate phasor extraction of fundamental frequency component. The proposed method can eliminate a DC offset component which is decayed exponentially. The proposed method uses only one cycle of data for phasor extraction computation, which does not need to preset the time constant of the DC offset component. Also, the other advantages of the proposed method is that gain compensation or phase compensation is not required after filtering. Simulations using ATP were performed to evaluate the performance of the proposed filter method, and the results were compared to the ones obtained by conventional methods.

• Journal of Power Electronics
• /
• v.16 no.5
• /
• pp.1861-1868
• /
• 2016

In this paper, a three-phase AC-DC high step-up converter is developed for application to microscale wind-power generation systems. Such an AC-DC boost converter prossessess the property of the single-switch high step-up DC-DC structure. For power factor correction, the advanced half-stage converter is operated under the discontinuous conduction mode (DCM). Simulatanously, to achieve a high step-up voltage gain, the back half-stage functions in the continuous conduction mode (CCM). A high voltage gain can be obtained by use of an output-capacitor mass and a coupled inductor. Compared to the output voltage, the voltage stress is decreased on the switch. To lessen the conducting losses, a low rated voltage and small conductive resistance MOSFETs are adopted. In addition, the coupled inductor retrieves the leakage-inductor energy. The operation principle and steady-state behavior are analyzed, and a prototype hardware circuit is realized to verify the performance of the proposed converter.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.26 no.6
• /
• pp.411-420
• /
• 2021

In this paper, bidirectional LLC-LC resonant DC-DC converter with notch filters in the primary side of resonant circuits is proposed. Even if resonant capacitors are used on the primary and secondary sides, the proposed converter can operate with the high gain characteristics of the LLC resonant converter without mutual coupling of resonant capacitors, regardless of the direction of power flow. In addition, by applying notch filters, the proposed converter can operate with a wider gain control range and can cope with overload and short circuit. The analysis and operating characteristics of the proposed bidirectional LLC-LC resonant converter are investigated. A 3.3 kW prototyped bidirectional LLC-LC resonant converter connected to 750 V_DC buses is designed and tested to verify the validity and applicability of this proposed converter.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.60 no.3
• /
• pp.126-132
• /
• 2011

A conventional LDO(Low Dropout Regulator) uses one OPAMP and one signal path. This means that OPAMP's DC Gain and Bandwidth can't optimize simultaneously within usable power. This also appears that regulation property and settling time of LDO can't improve at the same time. Based on this idea, a proposed LDO uses two OPAMP and has two signal path. To improve regulation property, OPAMP where is used in the path which qualities DC gain on a large scale, bandwidth designed narrowly. To improve settling time, OPAMP where is used in the path which qualities DC gain small, bandwidth designed widely. A designed LDO used 0.5um 1P2M process and provided 200mA of output current. A line regulation and load regulation is 12.6mV/V, 0.25mV/mA, respectively. And measured settling time is 1.5us in 5V supply voltage.

• Proceedings of the KIEE Conference
• /
• 1995.07c
• /
• pp.1108-1110
• /
• 1995

This paper presents a balanced CMOS complementary folded cascode OP-AMP topology that achieves improved DC gain using the gain boosting technique, a high unity-gain frequency and improved slew rate using the CMOS complementary cascode structure and a high PSRR using the balanced output stage. Bode-plot measurements of a balanced CMOS complementary folded cascode OP-AMP show a DC gain of 80dB, a unity-gain frequency of 110MHz and a slew rate of $274V/{\mu}s$(1pF load). This balanced CMOS complementary folded cascode OP-AMP is well suited for high frequency analog signal processing applications.

• Proceedings of the IEEK Conference
• /
• 2003.07b
• /
• pp.1117-1120
• /
• 2003

In this paper, a 1.5V CMOS high frequency operational amplifier for high frequency signal processing systems is presented. For obtaining the high gain and the high unity gain frequency with the 1.5V supply voltage, the op-amp is designed with simple two stages which are consisting of the rail-to-rail differential input stage and the class-AB output stage. The designed op-amp operates with the 1.5V supply voltage, and shows well the push-pull class-AB operation. The simulation results show the DC open loop gain of 77dB and the unity gain frequency of 100MHz for the 1㏁ ┃ 10pF load. When the resistive load R$_1$. is varied from 1㏁ to 1 ㏀, the DC open loop gain decreases by only 4dB.

• Proceedings of the IEEK Conference
• /
• 2006.06a
• /
• pp.113-114
• /
• 2006

In this paper, dual-gate mixer has been designed and optimized to have variable conversion gain for WiBro and WLAN applications and to save power. With the LO power of 0dBm and RF power of -50dBm, the mixer shows 15dB conversion gain. When RF power increases from -50dBm to -20dBm, the conversion gain decreases to -2dB with bias change. The variable conversion gain can reduce the high dynamic range requirement of AGC burden at IF stage. Also, it can save the dc power dissipation of mixer up to 90%.

• Journal of Power Electronics
• /
• v.17 no.2
• /
• pp.334-345
• /
• 2017

In order to meet the increasing needs of the hybrid energy source system for electric vehicles, which demand bidirectional power flow capability with a wide-voltage-conversion range, a bidirectional three-level DC-DC converter and some control strategies for hybrid energy source electric vehicles are proposed. The proposed topology is synthesized from Buck and Boost three-level DC-DC topologies with a high voltage-gain and non-extreme duty cycles, and the bidirectional operation principle is analyzed. In addition, the inductor current ripple can be effectively reduced within the permitted duty cycle range by the coordinated control between the current fluctuation reduction and the non-extreme duty cycles. Furthermore, benefitting from duty cycle disturbance control, series-connected capacitor voltages can also be well balanced, even with the discrepant rise and fall time of power switches and the somewhat unequal capacitances of series-connected capacitors. Finally, experiment results of the bidirectional operations are given to verify the validity and feasibility of the proposed converter and control strategies. It is shown to be suitable for hybrid energy source electric vehicles.