• Proceedings of the KIEE Conference
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• 1988.11a
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• pp.426-429
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• 1988

A Microprocessor Based Digital Control System is inherently contained a control lag for processing the control program and a data detection time lag. This two types of time lag may cause the system to become unstable. In this paper proposed predictive state observer is used to solve the two time lag problems. I-P control algorithm is used to attain deadbeat response by adjusting the observer gain to overcome the parameter variation or with disturbance. The speed response shows good performance through computer simulation.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.777-779
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• 2001

In this study, we have estimated the brushless DC motor parameters by means of back-emf measurement and step input test. The validity of proposed parameter estimation method is confirmed by step res pons experiment. And the reasonable digital controller is designed with the root locus method of motor transfer function and revised Ziegler-Nichols gain determination method. The system stability is experimentally verified by the frequency domain analysis used Bode plot.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.11a
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• pp.158-162
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• 1995

We report rf and power characteristics of AlGaAs/GaAs Heterojunction Bipolar Transistor (HBTs) for X-band power applications. HBTs have been fabricated with polyimide a an interlayer dielectric. By characterizing the DC and RF characteristics we obtained the maximum current gain of 45, BV$\_$CEO/ of 10 V, fT of 30 GHz and f$\_$max/ of 17 GHz for device with 6x14$\mu\textrm{m}$$^2$emitter size. To extract accurate equivalent parameters, the De-embedded method was applied for extraction of parasitic parameters and the calculation of circuit equations for intrinsic parameters. Based on the Load-pull method, power characteristics was simulated and measured to get the maximum output power of the device.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.5
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• pp.808-815
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• 1990

This paper treats with the design method for the single loop oversampled Sigma-Delta A/D converter with one delay and the digital integrator. Such an integrator was kgenerated by means of the bilinear transform of the analog integrator. The frequency spectrums of the quantizer and the decimator output signal are evaluated by FFT respectively. With the performance evaluation system, the values of SNR are obtained versus the input sinusoidal signal amplitude, frequency, the oversampling ratio, the DC-input level, the loop gain and the limitting value of the integrator. As compared with existing results, values of SNR versus the input signal amplitude and the oversampling ratio for the suggested system are about 6dB higher then previously reported results respectively. Furthermore, this approach achieves an about 60dB input dynamic range.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.461-464
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• 1998

Self-aligned AlGaAs/GaAs HBTs with the emitter area of 1.5*10.mu.$m^{2}$ were fabricated usng $WN_{x}$ as emitter metal. Their DC and RF characteristics were investigated. The common emitter current gain was 45 at $J_{c}$ = 6*$10^{4}$A/$cm^{2}$. From the Gummel plot, the ideality factors of $I_{c}$ and $I_{B}$ were 1.18 and 1.70, respectively. Emitter and base resistance were extracted from voltage drop region in gummel plot, and their values were 5.3.ohm. and 38.2.ohm.. The extrapolated $f_{T}$ = 72GHz and $f_{max}$ = 81GHz were obtained at $V_{CE}$ = 2V.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.10
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• pp.29-34
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• 1992

JFET's with gate lengths ranging from 1$\mu$m to 8.3$\mu$m are successfully fabricated on InP substrate where the long haul (1.3$\mu$m~8.3$\mu$m) OEIC's(OptoElectronic Integrated Circuits) have been made. The pn junction of InP JFET's is made by co-implantation and RTA process. JFET's have etched-mesa-gate structure and the maximum gm larger than 90mS/mm was measured and this is the highest record in JFET's of such structure without S/D n$^{+}$ ion implantation. To maintain maximum g$_m$ should be well controlled the overetch of n-layer which inevitably occurs during etching off the unused p-layer. The I-V characteristic is checked during p-layer etch, for this purpose. A dc voltage gain of 11 is obtained from a preamplifier circuit thus fabricated.

• 한국정보통신설비학회:학술대회논문집
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• 2004.08a
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• pp.369-372
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• 2004

In this paper, a low noise amplifier (LNA) in receiver of Low Noise Block Down Converter (LNB) for direct broadcasting service (DBS) is implemented by using GaAs HEMT The LNA is designed for operation between 10.7GHz-12.7GHz. The LNA consists of input, output matching circuits, DC-blocks and RF-chokes. The result of simulation of the LNA shows that a noise figure is less than 1.4dB and a gain is gloater than 9.2dB in the bandwidth of 10.7 to 12.7GHz with good flatness of 0. ldB

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.348-351
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• 2001

In this paper, the Gm-C filter for low voltage and low power applications using a fully-differential transconductor is presented. The designed transconductor using the series composite transistors and the low voltage composite transistors has wide input range at low supply voltage. A negative resistor load (NRL) technology for high DC gain of the transconductor is employed with a common mode feedback(CMFB). As a design example, the third-order Elliptic lowpass filter is designed. The designed filter is simulated and examined by HSPICE using TSMC $0.35{\mu}m$ CMOS n-well parameters. The simulation results show 138kHz cutoff frequency and 11.05mW power dissipation with a 3.3V supply voltage.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.257-260
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• 2000

In this paper, a Gm-C filter for low voltage and low power applications using a fully-differential transconductor is presented. The designed transconductor using the series composite transistors and the low voltage composite transistors has wide input range at low supply voltage. A negative resistor load (NRL) technology for high DC gain of the transconductor is employed with a common mode feedback (CMFB). As a design example, the third-order Elliptic lowpass filter is designed. The designed filter is simulated and examined by HSPICE using 0.25${\mu}{\textrm}{m}$ CMOS n-well parameters. The simulation results show 105MHz cutoff frequency and 2.4㎽ power dissipation with a 2.5V supply voltage.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.9-12
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• 2000

InP/lnGaAs heterojunciton phototransistors (HPTs) with transparent emitter contacts were fabricated and characterized. Indium Tin Oxide was RF sputtered for the emitter contacts. By comparison with InP/InGaAs HBTs, the dc characteristics of InP/lnGaAs HPTs demonstrated offset voltage due to ITO emitter contacts and similar common emitter current gain. The model parameters were extracted and a simple SPICE simulations were performed.