• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.16-23
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• 2003

In this paper, we propose an efficient bias circuit of discrete BJT component for hearing aid. The collector feedback bias circuit, widely used for the hearing aid, has a resistor for negative feedback. As the resistor affects AC and DC simultaneously, it is quite difficult to adjust amplifier gain without changing DC bias point. The previous bias circuit also has weak point to be oscillated by the positive feedback of power noise if gain of hearing aid is high. In the proposed circuit, we can reduce the two weak points of the previous circuit by adding a resistor to the collector feedback bias circuit between base and power supply which is $\beta$ times target than the collector resistor. Thus. we can change amplifier gain without changing DC bias point, and reduce power noise gain about 18.5% compare to that of tile previous circuit in the simulation.

• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.231-234
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• 2002

In this paper, we propose an efficient bias circuit for hearing aid using discrete BJT. The collector feedback bias circuit, widely used for the hearing aid, has a resister for negative feedback. As the resistor affects AC and DC simultaneously, it is quite difficult to adjust amplifier gain without changing DC bias point. The previous bias circuit also has weak point to be oscillated by the positive feedback of power noise if gain of hearing aid is high. In the proposed circuit, we can reduce the two weak points of the previous circuit by adding a resistor which is ${\beta}$ times larger than collector resistor between base of BJT and power supply.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.113-116
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• 2003

Confluence buffers and single flux quantum (SFQ) switches are essential components in constructing a high speed superconductive Arithmetic Logic Unit (ALU). In this work, we developed a SFQ confluence buffer and an SFQ switch. It is very important to optimize the circuit parameters of a confluence buffer and an SFQ switch to implement them into an ALU. The confluence buffer that we are currently using has a small bias margin of $\pm$11％. By optimizing it with a Josephson circuit simulator, we improved the design of confluence buffer. Our simulation study showed that we improved bias global margin of 10％ more than the existent confluence buffer. In simulations, the minimal bias margin was $\pm$33％. We also designed, fabricated, and tested an SFQ switch operating in a DC mode. The mask layout used to fabricate the SFQ switch was obtained after circuit optimization. The test results of our SFQ switch showed that it operated correctly and had a reasonably wide margin of $\pm$15％.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.10a
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• pp.35-38
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• 2018

This paper describes a low-power MPPT interface for DC-type energy harvesting sources. The proposed circuit consists of an MPPT controller, a bias generator, and a voltage detector. The MPPT controller consists of an MPG (MPPT Pulse Generator) with a schmitt trigger, a logic gate operating according to energy type (light, heat), and a sample/hold circuit. The bias generator is designed by employing a beta multiplier structure, and the voltage detector is implemented using a bulk-driven comparator and a two-stage buffer. The proposed circuit is designed with $0.35{\mu}m$ CMOS process. The simulation results show that the designed circuit consumes less than 100nA of current at an input voltage of less than 3V and the maximum power efficiency is 99.7%. The chip area of the designed circuit is $1151{\mu}m{\times}940{\mu}m$.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2002.02a
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• pp.109-110
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• 2002

The purpose of a superconductive DC/SFQ circuit is to produce a controlled number of picosecond single flux quantum pulses at the output when a slowly changing DC current is applied to the input. In this work, we have designed and simulated a DC/SFQ circuit based on Nb/Al$O_{x}$/Nb Josephson junction technology. From the simulation, we could obtain the margins for various circuit parameters. And also we have successfully operated a DC/SFQ circuit which was fabricated with the same design. The margin for the input bias current of the circuit was observed to be of $\pm$60%, which was very close to the simulated value.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.2 s.332
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• pp.87-92
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• 2005

In this paper, adaptive bias circuit and PBG structure have been employed to suppress IMD and improve PAE (Power Added Efficiency) of the power amplifier. It is controlling the gate 'dc' bias voltage with the envelope of the input RF signal. and The PBG structure has been employed on the output port of power amplifier . The proposed power amplifier using adaptive bias circuit and PBG has been improved the IMG by 3 dBc, and the average PAE by $35.54\%$, respectively.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.76-78
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• 2003

We have designed and tested an RSFQ (Rapid Single Flux Quantum) NDRO (Non Destructive Read Out) circuit for the development of a high speed superconducting ALU (Arithmetic Logic Unit). When designing the NDRO circuit, we used Julia, XIC and Lmeter for the circuit simulations and layouts. We obtained the simulation margins of larger than $\pm$25％. For the tests of NDRO operations, we attached the three DC/SFQ circuits and two SFQ/DC circuits to the NDRO circuit. In tests, we used an input frequency of 1 KHz to generate SFQ Pulses from DC/SFQ circuit. We measured the operation bias margin of NDRO to be $\pm$15％. The circuit was measured at the liquid helium temperature.

• Transactions on Electrical and Electronic Materials
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• v.9 no.6
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• pp.260-264
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• 2008

The operational characteristics of superconducting amplifier using vortex flux flow were analyzed from an equivalent circuit in which its current-voltage characteristics for the vortex motion in YBCO microbridge were reflected. For the analysis of operation as an amplifier, dc bias operational point for the superconducting amplifier is determined and then ac operational characteristics for the designed superconducting amplifier were investigated. The variation of transresistance, which describes the operational characteristics of superconducting amplifier, was estimated with respect to conditions of dc bias. The current and the voltage gains, which can be derived from the circuit for small signal analysis, were calculated at each operational point and compared with the results obtained from the numerical analysis for the small signal circuit. From our paper, the characteristics of amplification for superconducting flux flow transistor (SFFT) could be confirmed. The development of the superconducting amplifier applicable to various devices is expected.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.533-536
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• 2016

This paper describes a vibrational energy harvesting circuit with MPPT control. A high-performance AC-DC converter of which the efficiency is improved by using body-bias technique and bulk-driven technique is proposed and applied for the vibrational energy harvesting circuit design. MPPT (Maximum Power Point Tracking) control function is implemented using the linear relationship between the open-circuit voltage of a vibrational device and its MPP voltage. The designed MPPT control circuit traces the maximum power point by periodically sampling the open circuit voltage of a vibrational device, makes the reference voltages using sampled voltage and delivers the maximum available power to load. The proposed circuit is designed with a $0.35{\mu}m$ CMOS process, and the chip area is $1.21mm{\times}0.98mm$.

• Journal of Sensor Science and Technology
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• v.18 no.4
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• pp.280-285
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• 2009

In this paper, we designed a 2-stage CMOS operational amplifier with temperature compensation function using 2-poly 4-metal 0.35 $\mu$m standard CMOS technology. Using two bias circuits, the positive temperature coefficient(PTC) and the negative temperature coefficient(NTC) of the bias circuit are canceled out each other. When reference current circuit is simulated that it has a temperature coefficient of -150 ppm/$^{\circ}C$ with a temperature change from 0 $^{\circ}C$ to 120 $^{\circ}C$. Also the proposed circuit has a temperature coefficient of -0.011 dB/$^{\circ}C$ of DC open loop gain with the same temperature range.