• Transactions on Electrical and Electronic Materials
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• v.9 no.4
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• pp.151-155
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• 2008

Using pentacene field effect transistors (FETs) with Au source and drain electrodes, electron injection from the Au electrodes into the pentacene was investigated. The capacitance-voltage (C-V) and optical second harmonic generation (SHG) measurements were employed. Electron injection from the Au electrodes was suggested by the hysteresis behavior with the C-V characteristics and slowly decaying SHG signal under DC biasing, A mechanism of hole-injection assisted by trapped electrons is proposed. To confirm electron injection process, light-emitting behavior under the application of AC applied voltage was observed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.2
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• pp.42-42
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• 2001

본 논문은 주파수 천이를 적용시킨 광무선(fiber-radio)시스템의 광링크부에 대한 성능분석을 한다. 제시된 광링크부는 CS(control station)에서 얻어진 밀리미터파 대역 광파일럿톤(optical pilot tone)이 하향링크뿐 아니라 상향링크에도 공급되도록 하여 BS(base station)의 구조를 간단히 하였다. 광파일럿톤을 얻기 위해 CS의 EOM(electro-optic modulator)을 MAB(maximum bias), MIB(minimum bias), QB(quadrature bias)로 바이어스를 달리할 수 있으며 각각의 경우에 따라 링크의 성능을 분석한다. 분석은 레이저 광원의 전력이 일정한 경우와 PD(photo detector)에 수신되는 광 DC 전력이 일정한 경우에 대해서 행하여지며 각 경우에 대해서 최적의 하향링크 CNR 및 상향링크 SFDR(spurious free dynamic range)을 얻기 위해 효과적인 바이어스 방식을 제시한다

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.1
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• pp.75-87
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• 2012

A design paradigm using sequential geometric programming is presented to accurately design CMOS op amps with BSIM3. It is based on new adaptive modeling of transistor parameters through the operating point simulation. This has low modeling cost as well as great simplicity and high accuracy. The short-channel dc, high-frequency small-signal, and short-channel noise models are used to characterize the physical behavior of submicron devices. For low-power and low-voltage design, this paradigm is extended to op amps operating in the subthreshold region. Since the biasing and modeling errors are less than 0.25%, the characteristics of the op amps well match simulation results. In addition, small dependency of design results on initial values indicates that a designed op amp may be close to the global optimum. Finally, the design paradigm is illustrated by optimizing CMOS op amps with accurate transfer function.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.91-94
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• 2002

This paper presents a novel active common-mode EMI filter for the PWM inverter application. The proposed filter is based on the current sensing and compensation circuit and it utilizes a fast transistor amplifier for the current compensation. The amplifier utilizes an isolated low-voltage dc power supply for its biasing and it is possible to construct the active filter independent of the source voltage of the equipment. Thus the proposed active filter can be used in any application regardless of its working voltage. The effectiveness of the proposed circuit is verified by experimental results.

• Proceedings of the KIEE Conference
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• 2001.07d
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• pp.2570-2572
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• 2001

본 논문에서는 저주파 신호 증폭기에서 DC 이득에 의해 앰프가 포화되는 것을 막기 위해 필요한 큰 커플링 커패시터와 바이어스 저항의 면적을 줄이기 위한 회로를 제안한다. 또한, 이 경우 연산증폭기의 양 입력 단에 연결되는 바이어스 저항과 앰프의 이득을 설정하기 위해 사용되는 저항사이의 큰 값의 차이로 인해 발생하는 오프셋을 줄이기 위해 적절한 기준 전압을 정의하는 방법을 소개한다. 제안된 회로를 사용했을 때, 기존의 저항으로 앰프의 입력단을 바이어스할 때의 한계인 오프셋의 문제를 해결함으로써 보다 최적화된 면적으로 설계가 가능했다. 이 기법을 적외선 리모콘 수신 IC의 앰프에 적용했을 때, 커플링 커패시터와 바이어스 저항으로 설정되는 -3dB 주파수를 3kHz에 설정한 경우, 저항과 커패시터가 차지하던 면적의 12%를 차지했다.

• Progress in Superconductivity
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• v.3 no.1
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• pp.17-22
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• 2001

Practical implementation of the SFQ technology in most application requires more than single-chip-level circuit complexity. Multiple chips have to be integrated with a technology that is reliable at cryogenic temperatures and supports an inter-chip data transmission speed of tens of GHz. In this work, we have studied two basic issues in building large RSFQ circuits. The first is the reliable inter-chip SFQ pulse transfer technique using Multi-Chip-Module (MCM) technology. By noting that the energy contained in an SFQ pulse is less than an attojoule, it is not very surprising that the direct transmission of a single SFQ pulse through MCM solder bump connectors can be difficult and an innovative technique is needed. The second is the recycling of the bias currents. Since RSFQ circuits are dc current biased the large RSFQ circuits need serial biasing to reduce the total amount of current input to the circuit.

• Journal of Power Electronics
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• v.14 no.3
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• pp.444-457
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• 2014

This paper presents the design and realization of a digital PV simulator with a Push-Pull Forward (PPF) circuit based on the principle of modular hardware and configurable software. A PPF circuit is chosen as the main circuit to restrain the magnetic biasing of the core for a DC-DC converter and to reduce the spike of the turn-off voltage across every switch. Control and I/O interface based on a personal computer (PC) and multifunction data acquisition card, can conveniently achieve the data acquisition and configuration of the control algorithm and interface due to the abundant software resources of computers. In addition, the control program developed in Matlab/Simulink can conveniently construct and adjust both the models and parameters. It can also run in real-time under the external mode of Simulink by loading the modules of the Real-Time Windows Target. The mathematic models of the Push-Pull Forward circuit and the digital PV simulator are established in this paper by the state-space averaging method. The pole-zero cancellation technique is employed and then its controller parameters are systematically designed based on the performance analysis of the root loci of the closed current loop with $k_i$ and $R_L$ as variables. A fuzzy PI controller based on the Takagi-Sugeno fuzzy model is applied to regulate the controller parameters self-adaptively according to the change of $R_L$ and the operating point of the PV simulator to match the controller parameters with $R_L$. The stationary and dynamic performances of the PV simulator are tested by experiments, and the experimental results show that the PV simulator has the merits of a wide effective working range, high steady-state accuracy and good dynamic performances.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.152-159
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• 2016

This paper describes an offset and 1/f noise cancellation technique based hall sensor signal processor. The hall sensor outputs a hall voltage from the input magnetic field, which direction is orthogonal to hall plate. The two major elements to complete the hall sensor operation are: the one is a hall sensor to generate hall voltage from input magentic field, and the other one is a hall signal process system to cancel the offset and 1/f noise of hall signal. The proposed hall sensor splits the hall signal and unwanted signals(i.e. offset and 1/f noise) using a spinning current biasing technique and chopper stabilizer. The hall signal converted to 100 kHz and unwanted signals stay around DC frequency pass through chopper stabilizer. The unwanted signals are bloked by highpass filter which, 60 kHz cut off freqyency. Therefore only pure hall signal is enter the ADC(analog to dogital converter) for digitalize. The hall signal and unwanted signal at the output of an amplifer and highpass filter, which increase the power level of hall signal and cancel the unwanted signals are -53.9 dBm @ 100 kHz and -101.3 dBm @ 10 kHz. The ADC output of hall sensor signal process system has -5.0 dBm hall signal at 100 kHz frequency and -55.0 dBm unwanted signals at 10 kHz frequency.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1992.11a
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• pp.34-37
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• 1992

In this paper, the $(SrPb)(CaMg)TiO_3$-xBi_2O_3{\cdot}3TiO_2$ ceramics with paraelectric properties were fabricated by the mixed oxide method. In order to investigate the behavior of charged particles, the characteristics of electrical conduction and thermally stimulated current were measured respectively. As a result on characteristics of the electrical conduction, the leakage current was increased as measuring temperature was increased. At room temperature, the conduction current was divided into the three steps as a function of DC electric field. The first step was Ohmic region due to ionic conduction, below 15[kV/cm]. The second step was showed a saturation which seems to be related to a depolarizing field occuring in field-enforced ferroelectric phase, between 15[kV/cm] and 40[kV/cm]. The third step was attributed to Child's law related to spare charge which injected from electrode, above 40[kV/cm]. Thermally stimulated currents(TSC) spectra with various biasing fields exhibited three distinguished peaks that were denoted as ${\alpha}$, ${\alpha}'$ and ${\beta}$ peak, each of which appeared at nearby -30, 20 and 95[$^{\circ}C$] respectively. It is confirmed that the a peak was due to trap electron trapped in the grainboundary, and ${\alpha}'$ peak that was observed above only 1.5[kV/mm] was attributed to field-enforced ferroelectric polarization. The origin of ${\beta}$ peak was identified as ion migration which caused the degradation.

• Journal of the Korean Magnetics Society
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• v.14 no.4
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• pp.127-130
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• 2004

Magnetic properties and thermal stability by exchange biased perpendicular magnetic anisotropy in (Pd/Co)$_{N}$FeMn multilayer deposited by do magnetron sputtering system are investigated. We measured the perpendicular magnetization curves of (Pd(0.8nm)/Co(0.8nm)$_{5}$FeMn multilayer as function of FeMn thickness and annealing temperature. As FeMn thickness increases from 0 to 21nm, the perpendicular exchange bias(Hex) obtained 127 Oe at FeMn thickness 15nm. As the annealing temperature increases to 24$0^{\circ}C$, the E$_{ex}$ increased from 115 Oe to 190 Oe and disappeared exchange biased perpendicular magnetic anisotropy effect at 33$0^{\circ}C$.