• Journal of Power Electronics
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• v.19 no.4
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• pp.894-906
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• 2019

In this paper, a DC-DC converter is proposed based on the Cuk converter. The proposed converter has high efficiency and it can be used in multilevel DC-DC converters. A reduction of the inductors size in comparison to Cuk converter and a reduction in the inductors resistance negative effects on efficiency are the important points of the proposed converter. Its voltage ripple is reduced when compared to other converters. Its output voltage has a high quality and does not contain spikes. A theoretical analysis demonstrates the positive points of the proposed converter. The design and analysis of the converter are done in continues conduction mode (CCM). Experiments confirm the obtained theoretical equations. The proposed converter voltage gain is similar to that of a conventional Boost converter. As a result, they are compared. The comparison illustrates the advantages of the proposed converter and its higher quality. Furthermore, a prototype of the proposed converter and its combination with a 2x multiplier are built in the lab. Experimental results validate the analysis. In addition, they are in good agreements with each other.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.946-949
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• 2001

This paper proposes a new zero-current switching (ZCS) pulse-width modulation (PWM) switch cell that has no additional conduction loss of the main switch. In this cell, the main switch and the auxiliary switch turn on and turn off under zero current condition. The diodes commutate softly and the reverse recovery problems are alleviated. The conduction loss and the current stress of the main switch are minimized, since the resonating current for the soft switching does not flow through the main switch. Based on the proposed ZCS PWM switch cell, a new family of dc to dc PWM converters is derived. The new family of ZCS PWM converters is suitable for the high power applications employing IGBTs. Among the new family of dc to dc PWM converters, a boost converter was taken as an example and has been analyzed. Design guidelines with a design example are described and verified by experimental results from the 2.5 kW prototype boost converter operating at 40kHz.

• Journal of Power Electronics
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• v.14 no.2
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• pp.249-256
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• 2014

A novel topology generation method for the no dead-time three-phase AC/DC converter is proposed in this study. With this method, a series of no dead time topologies are generated and their operation principles are analyzed. The classic three-phase bridge AC/DC converter can realize a bidirectional operation. However, dead-time should be inserted in the driving signals to avoid the shoot-through problem, which would cause additional harmonics. Compared with the bridge topology, the proposed topologies lack the shoot-through problem. Thus, dead time can be avoided. All of the no dead time three-phase AC/DC converters can realize bidirectional operation. The operating principles of the converters are analyzed in detail, and the corresponding control strategies are discussed. Comparisons of waveform distortion and efficiency among the converters are provided. Finally, 9 KW DSP-based principle prototypes are established and tested. Simulation and experimental results verify the theoretical analysis.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.3
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• pp.384-390
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• 2012

This paper proposes a fault diagnosis method of the line-to-line voltage sensors in 3-phase AC/DC pulse width modulation (PWM) converters. The line-to-line voltage sensors are an essential device to obtain the information of the grid voltages for controlling the 3-phase AC/DC PWM converters. If the line-to-line voltage sensors are mismeasured by various faults, the voltage sensors can obtain wrong information of the grid voltage. It has an adverse effect on the control of the converter. Therefore, the converter causes the unbalance input AC current and the DC-link voltage ripple in the 3-phase AC/DC PWM converter. Hence, fast fault detection and fault tolerant control are needed. In this paper, the fault diagnosis method is proposed and verified through simulations and experiments.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1022-1024
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• 1992

The multiple poly-phase converters to be overcome the current limits of switching devices have the merits of the lessen weight and ripple. This paper deals with the circuit analysis of the poly-phase buck converters with discontinuous inductor current. The dc and ac models are obtained by the average method of the state equations.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.1
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• pp.43-50
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• 2007

In a high-speed flash style or a pipelining style analog-to-digital converter (A/D converter), the DC reference fluctuation caused by external noises becomes serious, as the sampling frequency is increased. To reduce the fluctuations in conventional A/D converters, capacitors have been simply used, but the layout area was large. Instead of capacitors, a low-noise and small-size DC reference circuit based on transmission gate (TG) is proposed in this paper. In order to verify the proposed technique, we designed and manufactured a 6-bit 2GSPS CMOS A/D converter. The A/D converter is designed with a 0.18um 1-poly 6-metal n-well CMOS technology, and it consumes 145mW at 1.8V power supply. It occupies the chip area of 977um by 1040um. The measured result shows that SNDR is 36.25 dB and INL/DNL is within 0.5LSB, even though the DC reference fluctuation is serious.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2671-2673
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• 1999

Front end AC to DC converters of the boost type are used in traction applications for generating the DC link for the inverters. A GTO based converter is usually switched with a switching frequency of 300 to 500Hz, resulting in low frequency harmonic problems. In order to avoid this, multiple converters with phase shifted carrier signals are used to suppress the low frequency harmonics. A detailed study of an AC to DC converter, parallel operated with reduced sensor and improved power-factor in light load conditions is presented in this paper.

• Journal of Power Electronics
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• v.12 no.3
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• pp.458-467
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• 2012

Single phase converters suffer from ripple power pulsating at twice the line frequency. The ripple power is usually absorbed by a bulky capacitor bank and/or a dedicative LC resonant link, resulting in a low power density and a high cost. An alternative solution is using a dc link active power filter (APF) to direct the pulsating power into another energy-storage component. The main dc link filter capacitor can then be reduced substantially. Based on a mainstream dc APF topology, this paper proposed a new control strategy incorporating both dual-loop control and repetitive control. The circuit parameter design is also re-examined from a control point of view. The proposed APF scheme has better control performance, and is more suited for high power applications since it works in CCM and with a low switching frequency.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.1
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• pp.9-13
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• 1996

The high precision of electrical power and energy measurements with wide range of frequency and power factor can be achieved by using the thermo-electrical power comparators. The paper describes the development of a precision power measuring system by using a ac/dc power comparator for measurement of power. Based on a thermal principle, the instrument performs ac-dc transfer for ac power measurements in the range of currents from 0 to 5 $A_{ms}$ , voltages from 0 to 240 $V_{ms}$ , power factors from 0 to 1 and frequencies from 0 to 1000 Hz. Two thermal converters with two heater are used in the functional element of the comparators. The ac-dc transfer accuracy is better than 20 ppm at unity power factor and better than 50 ppm at 0.5 power factor. (author). 8 refs., 5 figs., 3 tabs.

• Journal of Power Electronics
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• v.12 no.5
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• pp.739-747
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• 2012

This paper applies carrier phase shifted pulse-width modulation (CPS-PWM) to transformerless modular multilevel converters (MMC) to improve the output spectrum. Because the MMC topology is characterized by the double-star connection of six legs consisting of cascaded modular chopper cells with floating capacitors, the balance control of the DC-link capacitor voltage is essential for safe operation. This paper presents a leg-balancing control strategy to achieve DC-link voltage balance under all operating conditions. This strategy based on circulating current decoupling control focused on DC-link balancing between the upper and lower legs in each phase pair by considering the six legs as three independent phase-pairs. Experiments are implemented on a 100-V 3-kVA downscaled prototype. The experimental results show that the proposed leg-balancing control is both effective and practical.