• Title/Summary/Keyword: Cycle simulator

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PSIM Simulator for Analysis of Series HEV Operation (직렬형 HEV 운전 특성 분석을 위한 PSIM 시뮬레이터)

  • Lim, Deok-Young;Im, Jae-Kwan;Choi, Jae-Ho;Chung, Gyo-Bum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.6
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    • pp.487-497
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    • 2010
  • This paper describes the PSIM simulator for the analysis of the series type HEV operation. The traction force of the series type HEV of which engine is electrically coupled with a traction motor is supplied from the traction motor only. The rating of each power train components, such as gear, motor, ESS, ICE/generator, is designed with the Energy-Based Modeling method and the Electrical Peaking Hybrid(ELPH) method. Under driving cycle, the designed series HEV is evaluated with the developed PSIM simulator. A comparison between the conventional braking and the regenerative braking is performed with the average motor input power. And the fuel economy analysis is carried out on the basis of the simulation results.

The nuclear fuel cycle code ANICCA: Verification and a case study for the phase out of Belgian nuclear power with minor actinide transmutation

  • Rodriguez, I. Merino;Hernandez-Solis, A.;Messaoudi, N.;Eynde, G. Van den
    • Nuclear Engineering and Technology
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    • v.52 no.10
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    • pp.2274-2284
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    • 2020
  • The Nuclear Fuel Cycle Code "ANICCA" has been developed by SCK•CEN to answer particular questions about the Belgian nuclear fleet. However, the wide range of capabilities of the code make it also useful for international or regional studies that include advanced technologies and strategies of cycle. This paper shows the main features of the code and the facilities that can be simulated. Additionally, a comparison between several codes and ANICCA has also been made to verify the performance of the code by means of a simulation proposed in the last NEA (OECD) Benchmark Study. Finally, a case study of the Belgian nuclear fuel cycle phase out has been carried out to show the possible impact of the transmutation of the minor actinides on the nuclear waste by the use of an Accelerator Driven System also known as ADS. Results show that ANICCA accomplishes its main purpose of simulating the scenarios giving similar outcomes to other codes. Regarding the case study, results show a reduction of more than 60% of minor actinides in the Belgian nuclear cycle when using an ADS, reducing significantly the radiotoxicity and decay heat of the high-level waste and facilitating its management.

A Study in the Effects of DRAM on The Microprocessor Performance (마이크로프로세서의 성능에 끼치는 DRAM의 영향에 관한 연구)

  • Lee, Jongbok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.17 no.1
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    • pp.219-224
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    • 2017
  • Recently, the importance of DRAM is very significant not only in embedded systems and mobile devices but also in high-end modern microprocessors and multicore processors. To keep up with this, both industry and academia have actively studied various types of future DRAMs. Therefore, accurate DRAM model is requisite when evaluating the microprocessor performance. In this paper, a microprocessor trace-driven simulator which can couple with the cycle-accurate DRAM simulator has been developed. Using SPEC 2000 benchmarks as input, the effect of cycle-accurate DDR3 model on the microprocessor performance has been evaluated.

The DRAM Effects on The Performance of Multicore Processors (멀티코어 프로세서의 성능에 대한 DRAM의 영향)

  • Lee, Jongbok
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.17 no.3
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    • pp.203-208
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    • 2017
  • Recently, the importance of DRAM is very significant in multicore processors which are widely used in computers, laptops, tablet PCs, and mobile devices. To keep up with this, both industry and academia have actively studied various types of future DRAMs. Therefore, accurate DRAM model is requisite when evaluating the multicore processor performance. In this paper, a multicore processor trace-driven simulator which can couple with the cycle-accurate DRAM simulator has been developed. Using SPEC 2000 benchmarks as input, the effect of cycle-accurate DDR3 model on the multicore processor performance has been evaluated.

A Study on Hydrogen Production with High Temperature Solar Heat Thermochemical Cycle by Heat Recovery (열회수에 따른 고온 태양열 열화학 싸이클의 수소 생산에 관한 연구)

  • Cho, Ji-Hyun;Seo, Tae-Beom
    • Journal of the Korean Solar Energy Society
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    • v.37 no.2
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    • pp.13-22
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    • 2017
  • Two-step water splitting thermochemical cycle with $CeO_2/ZrO_2$ foam device was investigated by using a solar simulator composed of 2.5 kW Xe-Arc lamp and mirror reflector. The hydrogen production of $CeO_2/ZrO_2$ foam device depending on heat recovery of Thermal-Reduction step and Water-Decomposition step was analyzed, and the hydrogen production of $CeO_2/ZrO_2$ and $NiFe_2O_4/ZrO_2$ foam devices was compared. Resultantly, the quantity of hydrogen generation increased by 52.02% when the carrier gas of Thermal-Reduction step is preheated to $200^{\circ}C$ and, when the $N_2/steam$ is preheated to $200^{\circ}C$ in the Water-Decomposition step, the quantity of hydrogen generation increased by 35.85%. Therefore, it is important to retrieve the heat from the highly heated gases discharged from each of the reaction spaces in order to increase the reaction temperature of each of the stages and thereby increasing the quantity of hydrogen generated through this.

Effects of DRAM in The Embedded Processor Performance (DRAM이 임베디드 프로세서의 성능에 끼치는 영향)

  • Lee, Jong-Bok
    • Journal of Digital Contents Society
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    • v.18 no.5
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    • pp.943-948
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    • 2017
  • Currently, embedded systems designed for specific applications are used extensively in consumer electronics, smart phones, autonomous vehicles, robots, and plant control, etc. In addition, the importance of DRAM, which has a great influence on the performance of an embedded processor constituting an embedded system, has been increasing day by day, and research on DRAM has been actively conducted in industry and academia. Therefore, it is important to have a more accurate DRAM model in order to obtain reliable results when evaluating the performance of an embedded processor through simulation. In this paper, we developed an embedded processor simulator capable of interworking with a DRAM simulator. We also analyzed the influence of the DRAM model, which operates correctly on a cycle-by-cycle basis, on the performance of the embedded processor by using the MiBench embedded benchmark.

Shallow Junction Device Formation and the Design of Boron Diffusion Simulator (박막 소자 개발과 보론 확산 시뮬레이터 설계)

  • Han, Myoung Seok;Park, Sung Jong;Kim, Jae Young
    • 대한공업교육학회지
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    • v.33 no.1
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    • pp.249-264
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    • 2008
  • In this dissertation, shallow $p^+-n$ junctions were formed by ion implantation and dual-step annealing processes and a new simulator is designed to model boron diffusion in silicon. This simulator predicts the boron distribution after ion implantation and annealing. The dopant implantation was performed into the crystalline substrates using $BF_2$ ions. The annealing was performed with a RTA(Rapid Thermal Annealing) and a FA(Furnace Annealing) process. The model which is used in this simulator takes into account nonequilibrium diffusion, reactions of point defects, and defect-dopant pairs considering their charge states, and the dopant inactivation by introducing a boron clustering reaction. FA+RTA annealing sequence exhibited better junction characteristics than RTA+FA thermal cycle from the viewpoint of sheet resistance and the simulator reproduced experimental data successfully. Therefore, proposed diffusion simulator and FA+RTA annealing method was able to applied to shallow junction formation for thermal budget. process.

Study on Chip Design & Implementation of 32 Bit Floating Point Compatible DSP (32비트 부동소수점 호환 DSP의 설계 및 칩 구현에 관한 연구)

  • Woo, Jong-Sik;Seo, Jin-Keun;Lim, Jae-Young;Park, Ju-Sung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.11
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    • pp.74-84
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    • 2000
  • This paper deals with procedures for design and implementation of a DSP, which is compatible with TMS320C30 DSP. CBS(Cycle Based Simulator) is developed to study the architecture of the target DSP. The simulator gives us detailed information such as function block operation, control signal values, register condition, bus and memory values when a instruction is being carried out. RTL design is carried out by VHDL. Logic simulation and hardware emulation are employed to verify proper operation of the design. The DSP is fabricated with 0.6${\mu}m$ CMOS technology. The Chip has 450,000 gates complexity, $9{\times}9mm^2$ area, 20 MIPS operation speed. It is confirmed by running 109 instructions out of 114 instructions and 13 kinds of algorithm that the developed DSP has compatibility with TMS320C30.

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Development of a Micro-Simulator Prototype for Evaluating Adaptive Signal Control Strategies (교통대응 신호제어전략의 평가를 위한 미시적 시뮬레이터의 원형 개발)

  • 이영인;김이래
    • Journal of Korean Society of Transportation
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    • v.19 no.6
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    • pp.143-160
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    • 2001
  • Micro-simulation models have been recognized as an efficient assessment tool in developing traffic signal control technologies. In this paper a prototype of a microscopic simulation model which can be applied to evaluate the performance of traffic-adaptive signal control strategies was developed. In the simulation process, space-based arrays were appled to estimate parameters of car following and lane changing models. Two levels of link types, a micro-type and macro-type links, were also embodied in the simulation process. The proposed model was tested on a test network consists of 9 intersections. The performance of the proposed model was evaluated in link by link comparisons with the results of NETSIM. The results show that the proposed model could appropriately simulate traffic flows of the test network. The model also produces traffic adaptive signal timings, cycle lengths and green times for turning movements, based on the detector data. It implies that the optimization process of the model produces reasonable signal timings for the test network on the cycle basis.

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Electromagnetism Mechanism for Enhancing the Refueling Cycle Length of a WWER-1000

  • Poursalehi, Navid;Nejati-Zadeh, Mostafa;Minuchehr, Abdolhamid
    • Nuclear Engineering and Technology
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    • v.49 no.1
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    • pp.43-53
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    • 2017
  • Increasing the operation cycle length can be an important goal in the fuel reload design of a nuclear reactor core. In this research paper, a new optimization approach, electromagnetism mechanism (EM), is applied to the fuel arrangement design of the Bushehr WWER-1000 core. For this purpose, a neutronic solver has been developed for calculating the required parameters during the reload cycle of the reactor. In this package, two modules have been linked, including PARCS v2.7 and WIMS-5B codes, integrated in a solver for using in the fuel arrangement optimization operation. The first results of the prepared package, along with the cycle for the original pattern of Bushehr WWER-1000, are compared and verified according to the Final Safety Analysis Report and then the results of exploited EM linked with Purdue Advanced Reactor Core Simulator (PARCS) and Winfrith Improved Multigroup Scheme (WIMS) codes are reported for the loading pattern optimization. Totally, the numerical results of our loading pattern optimization indicate the power of the EM for this problem and also show the effective improvement of desired parameters for the gained semi-optimized core pattern in comparison to the designer scheme.