• 농촌지도와개발
• /
• 제17권2호
• /
• pp.213-232
• /
• 2010

The regional development strategy of China is involved basically with national macro economical development policies. In general, the development process were The procedures of 'balancing development-unbalancing development- rebalancing development'. The first restructuring is a balancing development strategy represented as the three-district construction and the second restructuring is the unbalancing development strategy represented as the preferential development of the east area after reformation & development. The third regional development strategy making current progress is a new regional balancing development policy including the great development of the west district. The study grasped how much the regional balancing development policy contributed to bridge the gap among other areas with coefficient of variation to analyze changes of regional development related indexes among the areas before/after the regional balancing development policy which had been progressed after 1991 with harmonious development among areas as its goal was carried out. It was also analyzed that the Chinese government's goal of regional development policy was how well-suited to the Chinese reality through regression analysis, so far. However, the results obtained of the study were summarized in Table6, Table7 and Table8.

• Journal of Power Electronics
• /
• 제3권4호
• /
• pp.205-214
• /
• 2003

This paper proposes a simple control strategy based on the discontinuous PWM (DPWM) to balance the DC-link voltage of three-level neutral-point-clamped (NPC) inverter at low modulation index. It introduces new DPWM methods in multi-level inverter and one of them is used for balancing the DC-link voltage. The current flowing in the neutral point of the DC-link causes the fluctuation of the DC-link voltage of the NPC inverter. The proposed DPWM method changes the path and duration time of the neutral point current, which makes the overall fluctuation of the DC-link voltage zero during a sampling time of the reference voltage vector. Therefore, by using the proposed strategy, the voltage of the DC-link can be balanced fairly well and the voltage ripple of the DC-link is also reduced significantly. Moreover, comparing with conventional methods which have to perform the complicated calculation, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by the experiment.

• Journal of Power Electronics
• /
• 제12권5호
• /
• pp.739-747
• /
• 2012

This paper applies carrier phase shifted pulse-width modulation (CPS-PWM) to transformerless modular multilevel converters (MMC) to improve the output spectrum. Because the MMC topology is characterized by the double-star connection of six legs consisting of cascaded modular chopper cells with floating capacitors, the balance control of the DC-link capacitor voltage is essential for safe operation. This paper presents a leg-balancing control strategy to achieve DC-link voltage balance under all operating conditions. This strategy based on circulating current decoupling control focused on DC-link balancing between the upper and lower legs in each phase pair by considering the six legs as three independent phase-pairs. Experiments are implemented on a 100-V 3-kVA downscaled prototype. The experimental results show that the proposed leg-balancing control is both effective and practical.

• Current Optics and Photonics
• /
• 제5권6호
• /
• pp.617-626
• /
• 2021

A parallel Monte Carlo photon migration algorithm for graphics processing units that implements an improved load-balancing strategy is presented. Conventional parallel Monte Carlo photon migration algorithms suffer from a computational bottleneck due to their reliance on a simple load-balancing strategy that does not take into account the different length of the mean free paths of the photons. In this paper, path-partition load balancing is proposed to eliminate this computational bottleneck based on a mathematical formula that parallelizes the photon path tracing process, which has previously been considered non-parallelizable. The performance of the proposed algorithm is tested using three-dimensional photon migration simulations of a human skin model.

• Journal of Power Electronics
• /
• 제19권3호
• /
• pp.803-814
• /
• 2019

This paper proposes a three-phase current balancing strategy in a power transmission system employing distributed static series compensators (DSSCs). With the proposed variable quadrature voltage injection method, the DSSC emulates either an inductive or a capacitive impedance into the transmission line, and the magnitudes of the phase currents are balanced. Hence, the phase imbalances in the power transmission system are significantly reduced. As a result, the power transfer capability of the transmission lines can be improved. The operational principle of the DSSCs, the hardware structure and the control algorithm are described in detail. Finally, the theoretical analyses and the proposed strategy are experimentally verified through a scaled down transmission system with DSSC prototypes.

• Journal of Electrical Engineering and Technology
• /
• 제13권2호
• /
• pp.550-558
• /
• 2018

This paper presents the current limit strategy of voltage controller of delta-connected H-bridge static synchronous compensator (STATCOM) under an unbalanced voltage fault event. When phase to ground fault happens, the feasibility to heighten the magnitude of sagging phase voltage is considered by using symmetric transformation method in delta-structure STATCOM. And the efficiency to cover the maximum physical current limit of switching device is considered by using vector analysis method that calculate the zero sequence current for balancing the cluster energy in delta connected H-bridge STATCOM. The result is simple and obvious. Only positive sequence current has to be used to support the unbalanced voltage sag. Although the relationship between combination of the negative sequence voltage with current and zero sequence current is nonlinear, the more negative sequence current is supplying, the larger zero sequence current is required. From the full-model STATCOM system simulation, zero sequence current demand is identified according to a ratio of positive and negative sequence compensating current. When only positive sequence current support voltage sag, the least zero sequence current is needed.

• Journal of Power Electronics
• /
• 제12권4호
• /
• pp.567-577
• /
• 2012

This paper introduces a new scheme to balance the DC bus voltages of a cascaded H-bridge converter which is used as a Distribution Static Synchronous Series Compensator (D-SSSC) in electrical distribution network. The aim of D-SSSC is to control the power flow between two feeders from different substations. As a result of different cell losses and capacitors tolerance the cells DC bus voltage can deviate from their reference values. In the proposed scheme, by individually modifying the reference PWM signal for each cell, an effective balancing procedure is derived. The new balancing procedure needs only the line current sign and is independent of the main control strategy, which controls the total DC bus voltages of cascaded H-bridge. The effect of modulation index variation on the capacitor voltage is analytically derived for the proposed strategy. The proposed method takes advantages of phase shift carrier based modulation and can be applied for a cascaded H-bridge with any number of cells. Also the system is immune to loss of one cell and the presented procedure can keep balancing between the remaining cells. Simulation studies and experimental results validate the effectiveness of the proposed method in the balancing of DC bus voltages.

• Journal of Power Electronics
• /
• 제19권1호
• /
• pp.79-88
• /
• 2019

The neutral-point (NP) voltage of three-phase three-level NP-clamped converters is needed for balance. To maintain NP potential and suppress ripple, a novel NP voltage balancing strategy is proposed in this work. The mechanism of NP voltage variation is studied first. Then, the relationship between the disassembly of zero level (O level) and NP current is studied comprehensively. On these bases, two methods for selecting one of three output phases for the disassembly of its O level are presented. Finally, simulation and experimental results verify the validity and practicability of the proposed algorithms.

• Journal of Power Electronics
• /
• 제16권2호
• /
• pp.769-777
• /
• 2016

This work focuses on current sharing between punch-through insulated gate bipolar transistors (IGBTs) connected in parallel and evaluates the mechanisms that allow overall current balancing. Two different control strategies are presented. These strategies are based on the modification of transistor gate-emitter control voltage V_GE by using an active gate driver circuit. The first strategy relies on the calculation of the average value of the current flowing through all parallel-connected IGBTs. The second strategy is proposed by the authors on the basis of a current cross reference control scheme. Finally, the simulation and experimental results of the application of the two current sharing control algorithms are presented.

• Journal of Power Electronics
• /
• 제10권5호
• /
• pp.572-578
• /
• 2010

This paper discusses a transformerless shunt static compensator (STATCOM) based on a modular multilevel converter (MMC). It introduces a new time-discrete appropriate current control algorithm and a phase-shifted carrier modulation strategy for fast compensation of the reactive power and harmonics, and also for the balancing of the three-phase source side currents. Analytical formulas are derived to demonstrate the accurate mechanism of the stored energy balancing inside the MMC. Various simulated waveforms verify that the MMC based STATCOM is capable of reactive power compensation, harmonic cancellation, and simultaneous load balancing, while controlling and balancing all of the DC mean voltages even during the transient states.