• Proceedings of the KIEE Conference
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• 2000.11b
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• pp.365-367
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• 2000

Recently, the power supply equipments have tendency to take multiple feedback loop paths. In this paper, the state space averaging technique is applied for the analysis of flyback type current mode control circuit. We made real converter for the gurantee of stable output characteristic and proper design of feedback circuit. The validity of proposed method is verified from test results. The improvement of stability is confirmed by sinusoidal signal injection method with isolated transformer. It is known that phase margin is sufficient and gain crossover frequency $f_c$ is nearly 1/5 of switching frequency $f_s$ from the experimental result with frequency response analyzer.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.289-292
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• 2001

A Novel fully-differential bipolar current-controlled current amplifier(CCCA) for electrically tunable circuit design at current-mode signal processing were designed. The CCCA was consisted of fully-differential subtracter and fully-differential current gain amplifier. The simulation result shows that the CCCA has current input impedance of 0.5 Ω and a good linearity. The CCCA has 3-dB cutoff frequency of 20 MHz for the range over bias current 100$mutextrm{A}$ to 20 ㎃. The power dissipation is 3 mW.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.381-383
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• 2007

Charge-pump high voltage inverter for Plasma backlight with CIM(Current Injection Method) is proposed in this paper. Adoption of ERC is a new attempt in high voltage inverter so that it is not only energy recovery but also improvement of discharge stability and system unstability which is interrupted by noise. Using a charge-pump technique enables low voltage switches to be usable, the cost can be reduce. CIM is adopted to achieve high speed energy recovery in proposed circuit. Operations of the proposed circuit are analyzed for each mode. The proposed circuit is verified to be applicable on a 32 inch plasma backlight panel by experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.2
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• pp.130-136
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• 2015

This study describes the structure and operation modes of vertical stabilization (VS) converter for international thermonuclear experimental reactor (ITER) and proposes a protection method. ITER VS converter supplies voltage (${\pm}1000V$)/current (${\pm}22.5kA$) to superconducting magnets for plasma current vertical stabilization. A four-quadrant operation must be achieved without zero-current discontinuous section. The operation mode of the VS converter is separated in 12-pulse mode, 6-pulse mode and circulation current mode according to the magnitude of the load current. Protection measures, such as bypass and discharge, are proposed for abnormal conditions, such as over current, over voltage, short circuit, and voltage sag. VS converter output voltage is controlled to satisfy voltage response time within 20 msec. Bypass operation is completed within 60 msec and discharge operation is performed successfully. The feasibility of the proposed control algorithm and protection measure is verified by assembling a real controller and implementing a power system including the VS converter in RTDS for a hardware-in-loop (HIL) facility.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.1-10
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• 2008

In this paper, we describe a design of a 128bit MRAM based on a new switching architecture which is Local Field Switching(LFS). LFS uses a local magnetic field generated by the current flowing through an MTJ. This mode reduces the writing current since small current can induce large magnetic field because of close distance between MTJ and the current. It also improves the cell selectivity over using conventional MTJ architecture because it doesn't need a digit line for writing. The MRAM has 1-Transistor 1-Magnetic Tunnel Junction (IT-1MTJ) memory cell structure and uses a bidirectional write driver, a mid-point reference cell block and a current mode sense amplifier. CMOS emulation cell is adopted as an LFS-MTJ cell to verify the operation of the circuit without the MTJ process. The memory circuit is fabricated using a $0.18{\mu}m$ CMOS technology with six layers o) metal and tested on custom board.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.44-48
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• 1998

In the buck-boost DC-DC converter which is used at a certain situation such as in factories where loads often change a lot, the switches in the device make big energy loss in operating at Buck-Boost Mode due to hard switching and are affected by lots of stresses which decrease the efficiency rate of the converter. In order to improve this problem, to decrease the loss of snubber and switching, it has been investigated that zero voltage switching mode and zero current switching mode which make the operation of switches with soft switching. For the more sophisticated and advanced device, this paper is presented the Partial Resonant Soft Switching Mode Power Converter which is adapted the power converter having the partial resonant soft switching mode, that makes switches operate when the resonant current or voltage becomes zero by making the resonant circuit partially at turning on and off of the switches with suitable layout of the resonant elements and switch elements in the converter. Also, this paper includes the analysis and simulation of the Partial Resonant type Buck-Boost Chopper.

• Journal of Power Electronics
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• v.14 no.4
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• pp.621-631
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• 2014

To invigorate the tapped-inductor boost (TIB) topology in emerging high step-up applications for off-grid products, a lossless snubber consisting of two capacitors and three diodes is proposed. Since the switch voltage stress is minimized in the proposed circuit, it is allowed to use a device with a lower cost, higher efficiency, and higher availability. Moreover, since the leakage inductance is fully utilized, no effort to minimize it is required. This allows for a highly productive and cost-effective design of the tapped-inductor. The proposed circuit also shows a high step-up ratio and provides relaxation of the switching loss and diode reverse-recovery. In this paper, the operation is analyzed in detail, the steady-state equation is derived, and the design considerations are discussed. Some experimental results are provided to confirm the validity of the proposed circuit.

• Journal of Welding and Joining
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• v.16 no.4
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• pp.63-72
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• 1998

In this study, the effects of the current pulsing conditions, on the spatter generation rate during the $CO_2$ gas metal arc welding (GMAW) were investigated. Normally using the inverter type power supply, of which the welding current waveform was regulated to reduce the spatter generation rate, but in this study pulsing was imposed on the welding current. Observation of the metal transfer phenomena during the pulsed current GMAS indicated that the droplet transfer from the electrode via the short circuit transfer and the repelling transfer mode could be minimized by selecting optimum combinations of pulsing parameters, which include base and peak current, base and pak duration. It was also demonstrated in this study that proper combinations of the pulsing parameters led to reduce generation of spatters during GMAW shielded by $CO_2$ gas.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.1
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• pp.65-71
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• 2015

This paper presents the efficiency analysis of a critical current mode interleaved PFC rectifier, in which each of three different semiconductor switches is employed as the active switch. The Si FET, SiC FET, and GaN FET are consecutively used with the prototype PFC rectifier, and the efficiency of the PFC rectifier with each different semiconductor switch is analyzed. An equivalent circuit model of the PFC rectifier, which incorporates all the internal losses of the PFC rectifier, is developed. The rms values of the current waveforms main circuit components are calculated. By adapting the rms current waveforms to the equivalent model, all the losses are broken down and individually analyzed to assess the conduction loss, switching loss, and magnetic loss in the PFC rectifier. This study revealed that the GaN FET offers the highest overall efficiency with the least loss among the three switching devices. The GaN FET yields 96% efficiency at 90 V input and 97.6% efficiency at 240 V, under full load condition. This paper also confirmed that the efficiency of the three switching devices largely depends on the turn-on resistance and parasitic capacitance of the respective switching devices.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.8
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• pp.1644-1650
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• 2009

An improved guarding circuit is applied to a transconductance driven-right-leg circuit to decrease common-mode current at measurement electrodes due to power-line interference. After showing conventional guarding circuit is instable due to gain-peaking when used with a transconductance DRL circuit, the effect of the proposed guarding circuit modified to suppress the gain-peaking by inserting a series resistor between shields and a shield driver was analyzed. It is shown that, besides stability, the proposed guarding circuit provides two other advantages: 1) The gain of the shield driver can be set to be unit nominally. 2) The loop gain of the transconductance DRL loop can be increased due to pole-zero canceling. The proposed circuit was implemented and the advantages were confirmed.