• 대한전자공학회논문지TC
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• 제42권11호
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• pp.61-66
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• 2005

본 논문은 WLAN에 이용되는 상위 6비트 온도계 코드의 전류원 셀 매트릭스와 중간 2비트 온도계 코드의 전류원, 그리고 하위 2비트 이진 가중치 코드의 서브 블록으로 구성된 10비트 210MHz의 CMOS 전류구동 디지털-아날로그 데이터 변환기(DAC)을 설계하였다. 제안된 새로운 글리치 억제회로는 입력된 신호의 교차되는 위치를 조절함으로써, 글리치 에너지를 최소화하도록 설계하였다. 또한 제안된 10비트 DAC는 CMOS $0.35{\mu}m$ 2-poly 4-metal 공정을 이용하여 설계하였으며, 유효 칩 면적은 5mm2이다. 제안된 10비트 DAC 칩의 측정결과, 변환속도는 210MHz, DNL/INL은 각각 ${\pm}0.7LSB/{\pm}1.1LSB$이며, 글리치 에너지는 $76pV{\cdot}sec$이고, SNR은 50dB, SFDR은 53dB((a)200MHz), 전력소비는 83mW((a)3.3V)로 측정되었다.

• 대한전자공학회논문지SD
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• 제47권3호
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• pp.51-57
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• 2010

IEEE 802.11n 기반 무선 LAN과 IEEE 802.16e 기반 Mobile WiMAX에 적용할 수 있는 이중모드 직접 변환 수신기를 $0.13\;{\mu}m$ RF CMOS 공정을 이용하여 설계하였다. 설계된 직접 변환 수신기는 2.3-2.7 GHz의 주파수 범위에서 동작을 한다. 저잡음 증폭기에 Current Steering 기술을 사용하여 전체 이득의 크기를 3 단계로 조절이 가능하게 하였다. 플리커 잡음 영향을 낮추기 위해 믹서에 Current Bleeding 기술을 사용하였다. 믹서 LO를 위한 I/Q 위상 신호 발생을 위해 주파수 2-분주회로를 포함하였다. 제작된 직접 변환 수신기는 1.4V의 공급 전원에서 LO 버퍼를 포함하여 56 mA를 사용하며, 32 dB의 전력이득과 4.8dB의 잡음지수, 그리고 +6 dBm의 출력 $P_{1dB}$를 가진다.

• 한국정보통신학회논문지
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• 제14권8호
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• pp.1877-1886
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• 2010

본 논문에서는 전기적인 퓨즈 프로그래밍을 이용한 1T-SRAM 리페어용 리던던시 제어 회로를 설계하였다. 공급전원이 낮아지더라도 외부 프로그램 전원을 사용하여 높은 프로그램 파워를 eFuse (electrical fuse)에 공급하면서 셀의 읽기 전류를 줄일 수 있는 듀얼 포트 eFuse 셀을 제안하였다. 그리고 제안된 듀얼 포트 eFuse 셀은 파워-온 읽기 기능으로 eFuse의 프로그램 정보가 D-래치에 자동적으로 저장되도록 설계하였다. 또한 메모리 리페어 주소와 메모리 액세스 주소를 비교하는 주소 비교 회로는 dynamic pseudo NMOS 로직으로 구현하여 기존의 CMOS 로직을 이용한 경우 보다 레이아웃 면적을 19% 정도 줄였다. 전기적인 퓨즈 프로그래밍을 이용한 1T-SRAM 리페어용 리던던시 제어 회로는 동부하이텍 $0.11{\mu}m$ Mixed Signal 공정을 이용하여 설계되었으며, 레이아웃 면적은 $249.02{\times}225.04{\mu}m^{2}$이다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.347-350
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• 2006

The high efficiency full-bridge LLC resonant converter using a contact-less transformer is proposed for the photovoltaic power generation system. For the series resonance with a series capacitor, the LLC resonant converter utilizes the leakage inductance and magnetizing inductance of a contact-less transformer. Unlike the conventional series resonant converter operated to the continuous resonant current at above resonance frequency, the proposed converter operates to the discontinuous resonant current at the narrow frequency control range below resonance frequency. Due to the discontinuous mode resonant current, the proposed converter can be achieved the zero voltage switching (ZVS) in the primary switches and the zero current switching (ZCS) in the secondary rectification diodes without any auxiliary circuit. In this paper, the experimental results of the proposed full-bridge LLC resonant converter using a contact-less transfonner are verified on the simulation based on the theoretical analysis and the 150W experimental prototype.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 전력전자학술대회
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• pp.179-180
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• 2011

This paper focuses on the Current-Voltage concurrent control method devoted to the multiple LED (light-emitting diode) string driver. Isolated DC to DC converter with cascaded chopping switch is proposed for smart lighting system such as light with sensor or back light unit of display, which need to control the current of parallel connected multiple LED stings and regulate DC voltage for micro controller for brightness control. The proposed circuit regulates the current of parallel connected multiple LED strings and additional DC voltage output simultaneously. To verify the performance, experimental results are presented based on the prototype board. 5V, 1A voltage mode electric load and two LED strings with different forward voltages are used for output loads. 23W output power is achieved and measured efficiency is in the range of 85%-87%

• 전력전자학회논문지
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• 제7권5호
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• pp.437-442
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• 2002

본 논문에서는 벅-부스트 형태에 기초한 전류형 PWM 인버터를 제안하고, 이를 태양광과 계통 연계를 위한 인터페이스 회로로서의 타당성을 검증하였다. 제안하는 회로는 다섯 개의 스위칭 소자를 가지게 되는데, 이 중 단 하나의 스위치만이 쵸핑 동작을 수행하게 되고, 나머지 스위치들은 출력단의 정·부 방향을 결정짓는데 이용된다. 따라서, 스위칭에 의한 손실을 상당히 저감시킬 수 있고, 입력단의 인덕터 전류를 전류 불연속 모드로 동작시켜 별도의 입력 전류의 검출이 없이도 출력단을 단위 역률화 할 수 있는 장점을 가진다. 제안하는 계통 연계형 인버터에 대한 동작을 이론적으로 분석하고 DSP TMS320F241을 이용한 150[W]급 시작품의 실험 결과로부터 제안하는 인버터의 타당성을 검증하였다.

• Journal of Welding and Joining
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• 제17권5호
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• pp.61-68
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• 1999

For the last two decades, waveform control techniques have been successively developed and applied for the inverter welding machines resulting in the substantial reduction of spatter generated in CO₂ welding. One of the constituents commonly involved in those techniques is to delay the instant of current increase to some extent after the initiation of short-circuiting. Although this technique has been known to be quite effective in reducing the spatter generation through the suppression of is instantaneous short circuiting, the delay time necessary for minimum spatter has not been clearly understood. In this study, the control system for varying the delay time was constructed so that the spatter generation rates could be measured over a wide range of delay time, 0.29-2.0 msec. As a result of this study, it was demonstrated that spatter generation rate(SGR) sharply decreased at delay time of 0.6 msec and longer accompanied with the change in characteristics of short circuit mode from the instantaneous short-circuiting(ISC) dominant to normal short-circuiting(NSC) dominant. Another feature that have been found in current waveform of over 0.6msec was the creation of current pulse right after the arc reignition stage. Because of this current pulses weld pool oscillated in wave-like fashion and it looks like to play an important role in developing short circuiting between electrode and weld pool.

• 한국초전도ㆍ저온공학회논문지
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• 제11권3호
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• pp.40-45
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• 2009

Many superconductor applications such as MRI and SMES must be operated in persistent current mode to eliminate the electrical ohmic loss. This paper presents the characteristic analysis of the high temperature superconducting (HTS) power supply made of YBCO coated conductor (CC). In this research, we have manufactured the HTS power supply to charge the 0.73 mH HTS double-pancake magnet made of YBCO CC. Among the all design parameters, the heater triggerring time and magnet applying time were the most important factors for the best performance of the HTS power supply. In this paper, three-dimensional simulation through finite element method (FEM) was used to study the heat transfer in YBCO CC and the magnetic field of the magnetic circuit. Based upon these results, the final operational sequence could be determined to generate the pumping current. In the experiment, the maximum pumping current reached about 16 A.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권2호
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• pp.128-133
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• 2008

Phase-change random access memory (PRAM) chip cell phase of amorphous state is rapidly changed to crystal state above 160 Celsius degree within several seconds during Infrared (IR) reflow. Thus, on-board programming method is considered for PRAM chip programming. We demonstrated the functional 512Mb PRAM with 90nm technology using several novel core circuits, such as metal-2 line based global row decoding scheme, PN-diode cells based BL discharge (BLDIS) scheme, and PMOS switch based column decoding scheme. The reverse-state standby current of each PRAM cell is near 10 pA range. The total leak current of 512Mb PRAM chip in standby mode on discharging state can be more than 5 mA. Thus in the proposed BLDIS control, all bitlines (BLs) are in floating state in standby mode, then in active mode, the activated BLs are discharged to low level in the early timing of the active period by the short pulse BLDIS control timing operation. In the conventional sense amplifier, the simultaneous switching activation timing operation invokes the large coupling noise between the VSAREF node and the inner amplification nodes of the sense amplifiers. The coupling noise at VSAREF degrades the sensing voltage margin of the conventional sense amplifier. The merit of the proposed sense amplifier is almost removing the coupling noise at VSAREF from sharing with other sense amplifiers.

• Journal of Power Electronics
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• 제19권4호
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• pp.881-893
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• 2019

This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.