• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.267-270
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• 2003

This paper proposes high performance $8{\times}8$ multiplier using current-mode quaternary logic technique. The multiplier is functionally partitioned into the following major sections: partial product generator block(binary-quaternary logic conversion), current-mode quaternary logic full-adder block, quaternary-binary logic conversion block. The proposed multiplier has 4.5ns of propagation delay and 6.1mW of power consumption. Also, this multiplier can easily adapted to binary system by the encoder, the decoder. This circuit is simulated under 0.35um standard CMOS technology, 5uA unit current, and 3.3V supply voltage using Hspice.

• Progress in Superconductivity and Cryogenics
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• v.14 no.3
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• pp.23-27
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• 2012

This paper aims to evaluate the feasibility of using no-insulation High Temperature Superconducting (HTS) coil in persistent current mode system. A HTS coil in persistent current mode system usually includes one or more non-superconducting joints in its circuit. And the current decaying rate of the coil is affected by the resistance of joint in persistent current circuit. If the resistance of joint is large, decaying rate of the current drastically increases. Therefore, reducing the joint resistance of the HTS coil is very important in persistent current mode system. In this paper, the no-insulation HTS coil is suggested as a way to reduce the joint resistance with the embedded parallel contact resistance naturally made by no-insulation winding method. Two small coils are fabricated with insulation and no-insulation winding method, and persistent current mode system experiment of each coil is preformed and analyzed.

• Journal of the Institute of Convergence Signal Processing
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• v.6 no.3
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• pp.134-142
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• 2005

The implementation of Multiple-Valued Logic(MVL) based on Current-Mode CMOS Logic(CMCL) circuits has recently been achieved. In this paper, four-valued Unary Multiple-Valued logic functions are synthesized using current-mode CMOS logic circuits. We properly make use of the fact that the CMCL addition of logic values represented using discrete current values can be performed at no cost and that negative logic values are readily available via reversing the direction of current flow. A synthesis process for CMCL circuits is based upon a logically complete set of basic elements. Proposed algorithm results in less expensive realization than those achieved using existing techniques in terms of the number of transistors needed. As an alternative to the cost-table techniques Universal Unary Programmable Circuit (UUPC) for a unary function is also proposed.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.4B no.2
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• pp.65-72
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• 2004

Switching power supply systems are widely used in many industrial fields. Power factor correction (PFC) circuits have a tendency to be applied in new power supply designs. The input active power factor correction (APFC) circuits can be implemented in either the two-stage approach or the single-stage approach. The two-stage approach can be classified into boost type PFC circuit and dc/dc converter. The power factor correction circuit with a boost converter used as an input power source is studied in this paper. In a boost power factor correction circuit there are two feedback control loops, which are a current feedback loop and a voltage feedback loop. In this paper, the regulation performance of output voltage and compensator to improve the transient response presented at the continuous conduction mode (CCM) of the boost PFC circuit is analyzed. The validity of designed boost PFC circuit is confirmed by MATLAB simulation and experimental results.

• Proceedings of the KSR Conference
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• 1998.11a
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• pp.249-254
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• 1998

This paper describes the control methods to cut out the NFB(No Fuse Breaker) of shorted load in the auxiliary power supply, Generally, when the short-circuit occurs in the load of the auxiliary power supply, the auxiliary power supply stops the operation according to the protection sequence. Finally, the other auxiliary power supply stops the operation by the same fault, To resolve this problem, we suggest the control method to trip the NFB of shorted load. That is, when the short circuit occurs, the controller changes control mode from voltage mode to current mode without the operation of output contactor(SIVK) in the auxiliary power supply. The auxiliary power supply provides a large current for the short-circuit load. After some time, the NFB of the short-circuit load is cut off and the auxiliary power supply Provides stable voltage for the loads except for the short-circuit load.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.7
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• pp.659-664
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• 2016

In this paper, we suggest operational trans-conductance amplifier(OTA) for current-mode FIR filter that can be used in a digital circuit system requiring high operating frequency and low power consumption. The current-mode signal processing is one of the very innovative design method for a low power consumption system with high operating frequency because it shows a constant power regardless of frequency. From the simulation result using 0.35um CMOS process, when Vdd is 2V, it is confirmed that the proposed circuit showed the dynamic range of the about 1V, about 50% of supply voltage and output current swing of about 0~200uA. Also, the power consumption was evaluated with about 21uW and the active size for an integration was measured with $71um{\times}166um$.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.1029-1032
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• 2000

A neuro-fuzzy based circuit to recognize circuit pat-terns is proposed in this paper. The simple algorithm and exemption from the use of template patterns as well as multipliers enable the proposed circuit to implement on the hardware of an economical scale. Furthermore, thanks to the circuit design by using current-mode techniques, the proposed circuit call achieve easy extendability of tile circuit and efficient pattern recognition with high-speed. The validity of the proposed algorithm and tile circuit design is confirmed by computer simulations. The proposed pattern recognition circuit is integrable by a standard CMOS technology.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1881-1884
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• 2003

In some requirements of dc motor drive circuit applications are high quality output with generation of low internal conducted EMI. However the conventional dc motor drive circuits have been usually using unbalanced circuit which generates the high conducted EMI to the frame ground. This paper presents a balanced dc motor drive circuit which is effective way to reduce the common-mode noise. The circuit balancing is to make the noise pick up or occurring in both conductor lines, signal path and return path is equal in amplitude and opposite phase so that it will cancel out in the frame ground. The common-mode conducted noise reduction of this proposed dc motor drive is confirmed by experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.2
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• pp.85-91
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• 2022

This study proposes a high efficiency bridgeless Power Factor Correction (PFC) converter with improved common mode noise characteristics. Conventional PFC has limitations due to low efficiency and enlarged heat sink from considerable conduction loss of bridge diode. By applying a Common Mode (CM) coupled inductor, the proposed bridgeless PFC converter generates less conduction loss as only a small magnetizing current of the CM coupled inductor flows through the input diode, thereby reducing or removing heat sink. The input diode is alternately conducted every half cycle of 60 Hz AC input voltage while a negative node of AC input voltage is always connected to the ground, thus improving common mode noise characteristics. With the aim to improve switching loss and reverse recovery of output diode, the proposed circuit employs Critical Conduction Mode (CrM) operation and it features a simple Zero Current Detection (ZCD) circuit for the CrM. In addition, the input current sensing is possible with the shunt resistor instead of the expensive current sensor. Experimental results through 480 W prototype are presented to verify the validity of the proposed circuit.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.5
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• pp.230-237
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• 2003

Current mode control has been used for DC to DC converters for over twenty years. There are many different control schemes which use the inductor current signal in one way or another to control the DC to DC converter. In this paper, the state space averaging technique is applied for the analysis of flyback type current mode control circuit. We made real converter for the guarantee of stable output characteristic and proper design of feedback circuit. The validity of proposed method is verified from test result. The improvement of stability is confirmed by sinusoidal signal injection method with isolated transformer. It is known that phase margin is sufficient and gain crossover frequency fc is early 1/5 of switching frequency, fs, from the experimental result with frequency response analyzer.