• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.837-840
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• 2008

This paper studies the current regulator of LED Backlighting system for LCD. The proposed regulator and a typical regulator are introduced. To find out the characteristics of two regulators, Prototype samples of LED Backlighting system are made. Both the proposed regulator and a typical regulator are compared with electrical, thermal and optical characteristics each viewpoint.

• 전력전자학회논문지
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• 제14권1호
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• pp.46-53
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• 2009

본 논문은 다중출력 전원 시스템을 위한 새로운 구조의 영전류 스위칭(ZCS, Zero Current Switching) LLC 공진형 Post-regulator를 제안한다. 기존의 LLC 공진형 컨버터는 정밀한 다중 출력을 얻기 위해 추가의 비 절연형 DC/DC 컨버터가 요구되었고, 이는 전력 변환 효율 감소 및 제조 원가 상승의 단점을 갖고 있다. 제안된 Post-regulator는 각 정류 다이오드 및 전력 스위치의 내압 및 전류 스트레스가 작고, 부피가 큰 고가의 비 절연형 DC/DC 컨버터의 추가 대신 1 개의 보조 스위치만으로 구현되므로 구조가 간단하고, 저가격화에 유리하다. 또한, 제안된 Post-regulator의 모든 전력 스위치는 영전류 스위칭이 가능하므로 EMI 특성이 우수하며 스위칭 손실을 최소화 할 수 있다. 최종적으로 본 논문에서 제안된 전원 시스템의 동작 원리 및 타당성을 검증하기 위하여, 영전류 스위칭 LLC 공진형 Post-regulator의 실험 결과를 제시한다.

• Journal of Power Electronics
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• 제12권5호
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• pp.689-698
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• 2012

This paper investigates the effects of applying different input current waveshapes on the performance of a continuous-conduction-mode (CCM) power-factor-correction (PFC) boost pre-regulator. It is found that the output voltage ripple of the pre-regulator can be reduced if the input current is modified to include controlled amount of higher order harmonics. This finding allows us to balance the performance of output regulation and the harmonic current emission when coming to the design of the pre-regulator. An experimental PFC boost pre-regulator prototype is constructed to verify the analysis and show the benefit of the pre-regulator operating with input current containing higher order harmonics.

• 전기전자학회논문지
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• 제27권3호
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• pp.308-312
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• 2023

게이트 전류 감지 구조는 LDO 레귤레이터가 오버슈트 또는 언더슈트 상황 발생 시 출력전압의 레귤레이션을 보다 효과적으로 제어하기 위해 제안되었다. 기존의 전형적인 LDO 레귤레이터는 부하전류가 변화할 때 레귤레이션 전압 변화가 발생한다. 하지만 게이트 전류 감지 구조를 이용하여 패스 트랜지스터에 있는 게이트 단자 전류를 공급/방전 함으로 인해 패스 트랜지스터의 동작 속도를 더욱 향상시킬 수 있다. 게이트 전류 감지 구조를 이용한 LDO 레귤레이터의 입력전압은 3.3 V ~ 4.5 V 이며 출력 전압은 3 V이고 부하 전류는 최대 250 mA의 값을 갖는다. 시뮬레이션 결과, 부하 전류가 250 mA 까지 변화할 때 약 9 mV의 전압 변화 값을 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권6호
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• pp.810-817
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• 2014

An on-chip current sensor with fast response time for the peak-current-mode buck regulator is proposed. The initial operating points of the peak current sensor are determined in advance by the valley current level, which is sensed by a valley current sensor. As a result, the proposed current sensor achieves a fast response time of less than 20 ns, and a sensing accuracy of over 90%. Applying the proposed current sensor, the peak-current-mode buck regulator for the mobile application is realized with an operating frequency of 2 MHz, an output voltage of 0.8 V, a maximum load current of 500 mA, and a peak efficiency of over 83%.

• Journal of Electrical Engineering and Technology
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• 제12권4호
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• pp.1593-1599
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• 2017

This paper presents a multi-channel light-emitting diode (LED) driver IC with a current-mode current regulator. The proposed current regulator replaces resistors for current sensing with a sequentially controlled single current sensor and a single regulation loop for sensing and regulating all LED channel currents. This minimizes the current mismatch among the LED channels and increases voltage headroom or, equivalently, power efficiency. The proposed LED driver IC was fabricated in a $0.35-{\mu}m$ BCD 60-V high voltage process, and the chip area is $1.06mm^2$. The measured maximum power efficiency is 93.4 % from a 12-V input, and the inter-channel current error is smaller than as low as ${\pm}1.3%$ in overall operating region.

• ETRI Journal
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• 제37권5호
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• pp.961-971
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• 2015

This paper proposes a 250 mV supply voltage digital low-dropout (LDO) regulator. The proposed LDO regulator reduces the supply voltage to 250 mV by implementing with all digital circuits in a$0.11{\mu}m$ CMOS process. The fast current tracking scheme achieves the fast settling time of the output voltage by eliminating the ringing problem. The over-voltage and under-voltage detection circuits decrease the overshoot and undershoot voltages by changing the switch array current rapidly. The switch bias circuit reduces the size of the current switch array to 1/3, which applies a forward body bias voltage at low supply voltage. The fabricated LDO regulator worked at 0.25 V to 1.2 V supply voltage. It achieved 250 mV supply voltage and 220 mV output voltage with 99.5% current efficiency and 8 mV ripple voltage at $20{\mu}A$ to $200{\mu}A$ load current.

• 전기학회논문지P
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• 제56권2호
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• pp.65-73
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• 2007

In this study, the pulse charger and voltage regulator are proposed that can reuse the waste lead acid battery. The first we develop the voltage regulator that can reuse the waste lead battery. And the pulse current is applied to the terminal of the waste lead acid battery. The voltage regulator is available principle of the pulse current which can reduce the sulfate to incipient material such as Pb and PbO2. Therefore the internal resistance of the lead acid battery is decreased, the performance of the lead acid battery is improved and the durability is prolonged. The second we develop the pulse charger using the voltage regulator. The pulse charger uses the switch mode of the forward convert method. The pulse charger maintain the constant voltage in state removing the lead acid battery and when it connected the pulse charger, it is converted the charge mode of the constant current immediately. It continues the rapid charge until the full state of the lead acid battery. After that the pulse charger is converted to the charge mode of constant voltage automatically, and then it continues the normal charge. The experiment results show that the effectiveness of the voltage regulator and pulse charger such as the good performance and the prolonged durability in lead acid battery of the small and large capacity.

• Journal of electromagnetic engineering and science
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• 제14권4호
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• pp.376-381
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• 2014

We present a CMOS rail-to-rail class-AB amplifier using dynamic current biasing to improve the delay response of the error amplifier in a low-dropout (LDO) regulator, which is a building block for a wireless power transfer receiver. The response time of conventional error amplifiers deteriorates by slewing due to parasitic capacitance generated at the pass transistor of the LDO regulator. To enhance slewing, an error amplifier with dynamic current biasing was devised. The LDO regulator with the proposed error amplifier was fabricated in a $0.35-{\mu}m$ high-voltage BCDMOS process. We obtained an output voltage of 4 V with a range of input voltages between 4.7 V and 7 V and an output current of up to 212 mA. The settling time during line transient was measured as $9{\mu}s$ for an input variation of 4.7-6 V. In addition, an output capacitor of 100 pF was realized on chip integration.

• 전기전자학회논문지
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• 제27권3호
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• pp.258-264
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• 2023

본 논문에서는 부하전류에 따라 LDO(Low Drop Out) 레귤레이터의 효과적인 동작과 파괴 방지를 위해 ESD(Electro Static Discharge) 보호회로를 내장한 LDO 레귤레이터를 제안한다. 제안하는 LDO 레귤레이터는 additional feedback current 회로구조를 이용하여 LDO 레귤레이터의 출력전압에 따라 더욱 효과적으로 패스 트랜지스터의 게이트 노드 전압을 조절할 수 있다. 또한 기존의 ESD 보호소자에 P+ bridge를 추가하여 SCR 루프 상의 전류 이득을 감소시켜 홀딩 전압을 약 2V 가량 높인 새로운 구조를 내장하여 ESD 상황에 대해 높은 신뢰성을 가질 것으로 예상된다.