• Title/Summary/Keyword: Current harmonic minimum

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Study of harmonic reduction method in PWM Inverter of washing machine BLDC motor that use single current sensor (단일 전류 감지기를 이용한 세탁기 BLDC 모터의 PWM Inverter 에서 고조파 저감방법에 관한 연구)

  • Kim, Hwa-Sung;Yoo, Ji-Yoon
    • Proceedings of the KIPE Conference
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    • 2007.11a
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    • pp.142-144
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    • 2007
  • This paper proposes problem improvement in existing method about three-phase current reconstruction method and present minimum voltage injection method and Smooth voltage injection method in single current sensor for washing machine motor drive. So, presented wash noise improvement method through ripple reduction in inverter. The simulation and experimental results are given to show the effectiveness of the proposed method for reconstructing the phase currents and reducing the noises.

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Effect of Harmonics on Residual Current Protective Devices (고조파가 누전차단기에 미치는 영향)

  • Jeon, Jeong-Chay;Lee, Sang-Ick;Yoo, Jae-Geun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.3
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    • pp.84-89
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    • 2006
  • Tripping of residual current protective devices(RCPDs) caused by harmonics has been continuously reported, but no literature is available on the behavior of RCPDs caused by harmonics. This paper, in order to find out the effects of harmonics on RCPDs, investigated the present condition on malfunction of RCPDs and measured harmonics at buildings where nuisance tripping of RCPDs was often occurred. Also, the operational characteristics of RCPDs were tested by the harmonics synthesizer that can generate distorted waveform. Results of experiment detected that there was minimum tripping current of RCPDs when third harmonic added to the fundamental frequency. And it was found that the leakage current to cause tripping of RCPDs increased with more higher order harmonics added to the fundamental frequency.

Optimized LCL filter Design Method of Utility Interactive Inverter (계통연계형 인버터의 LCL필터 최적 설계기법)

  • Jung, Sang-Hyuk;Choi, Se-Wan
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.1
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    • pp.103-109
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    • 2013
  • The conventional LCL filter design method of the utility interactive inverter considers only harmonics attenuation of the current injected to the grid. However, in case of utility-interactive inverter with critical load the voltage quality of the critical load should also be considered for LCL filter design. Also, considering cost and volume of LCL filters. it is important to have minimum values of inductance and capacitance as far as the harmonic standards are satisfied. In this paper a LCL filter design method is proposed to satisfy not only the harmonic standards of the grid current during the grid-connected mode but the voltage quality of the critical load during grid-connected mode and stand-alone mode. With the proposed method optimized values of LCL filters could be obtained by applying weighting factor to voltage ripple across the critical load, inductor volume, amount of reactive current and system bandwidth.

Design Methodology of Passive Damped LCL Filter Using Current Controller for Grid-Connected Three-Phase Voltage-Source Inverters

  • Lee, Jun-Young;Cho, Young-Pyo;Kim, Ho-Sung;Jung, Jee-Hoon
    • Journal of Power Electronics
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    • v.18 no.4
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    • pp.1178-1189
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    • 2018
  • In grid-connected voltage-source inverters (VSIs), when compared with a simple inductive L filter, the LCL filter has a better performance in attenuating the high frequency harmonics caused by the pulse-width modulation of power switches. However, the resonance peaks generated by the filter inductors and capacitors can make a system unstable. In terms of simplicity and filter design cost, a passive damping method is generally preferred. However, its high power loss and degradation in high frequency harmonic attenuation are significant demerits. In this paper, a mathematical design solution for a passive LCL filter to derive filter parameters suppressing the high frequency current harmonics to 0.3% is proposed. The minimum filter inductance can be obtained to reduce the size of the filter. Furthermore, a minimum damping resistance design considering a current controller is analyzed for a stable closed-loop system. The proposed design method is verified by experimental results using a 5-kW three-phase prototype inverter.

A Study on the PWM Generation using Time Average Model (시평균화방법을 이용한 PWM 신호발생에 관한 연구)

  • Hong, Soon-Wook;Cha, Jae-Deok;Cho, Kyu-Bock
    • Proceedings of the KIEE Conference
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    • 1992.07b
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    • pp.1088-1091
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    • 1992
  • Programmed PWM(Pulse Width Modulated) generation techniques eliminating several low order harmonics have been widely used in the inverter circuit which produces minimum current ripple, reduced torque pulsation and thereby improves overall system performance. However, the applications of the programmed PWM technique are limited to CVCF(Constant Voltage Constant Frequency) applications and various motor drives. Although the programmed PWM produces a lower harmonic distorted waveform than the carrier modulated PWM, real-time programming is not possible because of the complicated calculation required for the gating signal. In this paper, a new programmed PWM technique named TAM (time averaging model) is developed to compensate for the demerits of the conventional programmed PWM technique with moderate harmonic distortion. Computer simulations are performed to verify the performance of the proposed algorithm.

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An FPGA-based Fully Digital Controller for Boost PFC Converter

  • Lai, Li;Luo, Ping
    • Journal of Power Electronics
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    • v.15 no.3
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    • pp.644-651
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    • 2015
  • This paper introduces a novel digital one cycle control (DOCC) boost power factor correction (PFC) converter. The proposed PFC converter realizes the FPGA-based DOCC control approach for single-phase PFC rectifiers without input voltage sensing or a complicated two-loop compensation design. It can also achieve a high power factor and the operation of low harmonic input current ingredients over universal loads in continuous conduction mode. The trailing triangle modulation adopted in this approach makes the acquisition of the average input current an easy process. The controller implementation is based on a boost topology power circuit with low speed, low-resolution A/D converters, and economical FPGA development board. Experimental results demonstrate that the proposed PFC rectifier can obtain a PF value of up to 0.999 and a minimum THD of at least 1.9% using a 120W prototype.

Decision of Modulation Index of Current-Source TPWM Inverter for Minimization of Speed Ripple and Position Error (속도맥동 및 위치오차를 최소로 하는 전류원 TPWM 인버터의 변조도 결정)

  • 구본호;권우현;김수중
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.11
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    • pp.1819-1828
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    • 1989
  • In this paper, we determined the modulation index for minimization of speed ripple and position error using maximum speed ripple (SRF) and maximum position error(PEF) in current source TPWM inverter. Through computer simulation, we compared with total current harmonic distortion, SRF and PEF for square wave modulation method and TPWM method. As a result, it turns out that square wave modulation method is superior to TPWM method of 3 pulses per half cycle in speed ripple and position error contents. And TPWM is better than square wave method when pulse number is more than 5. Also, in these pulse numbers, moduladtion index of minimum speed ripple and munimum position error is 0.91.

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A New Switching Method for 3-level GTO Inverter Considering DC-link Voltage Balancing and Minimum on/off time (DC-링크 전압균형과 최소 온-오프 시간을 고려한 새로운 3-레벨 GTO 인버터 제어기법)

  • Lee, Yo-Han;Hyun, Dong-Seok
    • Proceedings of the KIEE Conference
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    • 1994.07a
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    • pp.373-375
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    • 1994
  • In realizing a three-level GTO inverter, we should keep the voltage balancing of DC-link capacitors and consider minimum on/off time of GTO thyristors in order to make the same blocking voltage across each device and to minimize the harmonic components of the output voltage and current. In this raper, a new PWM scheme based on space voltage vectors, by which it is possible to keep neutral-point voltage and avoid narrow pulse, is presented. Experimental results verify that the proposed PWM control scheme is suitable fur hish power and high voltage three-level GTO inverters applied to induction motor drives.

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Selection of pulse number and modulation index for minimum speed ripple in trapezoidal CSI-PWM (Trapezoidal PWM 전류원 인버터에서 최소 Speed Ripple을 위한 펄스 수 및 변조도의 결정)

  • Kwon, Woo-Hyeon;Goo, Bon-Ho;Lee, Chi-Hwan;Lee, Chang-Hwa
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.127-129
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    • 1988
  • Square-wave current source inverter drives suffer from torque pulsation and speed variation at low speed. Attempts to minimize these problems, CSI PWM strategies have been reported. It is shown that these PWM strategies are based on unnecessarily restrictive modulation laws. In this paper, trapezoidal PWM strategy for CSI is investigated theoratically by double fourier series and we proposed Harmonic Speed ripple Factor(HSF) that is independent of motor parameters and load conditions. Speed ripple are considered in T-PWM and square wave inverter by HSF. We obtain modulation index(M) and carrier ratio (CR) for minimum speed ripple.

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The Developed Study for SMPS to Protect the Noise and Inrush Current at LED Lighting Source (LED 광원에서 잡음 및 돌입전류 방지를 위한 스위칭모드 전원공급 장치 (SMPS) 개발 연구)

  • Chung, Chansoo;Hong, Gyujang;We, Sungbok;Yu, Geonsu;Kim, Mijin
    • KEPCO Journal on Electric Power and Energy
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    • v.2 no.4
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    • pp.577-582
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    • 2016
  • This Study focused on the development of SMPS (Switching Mode Power Supply) to supply the constant votage and current nevertheless LED fluorescent Light generated the electric noise (with Harmonics) and Inrush current at instant time of turn-on and off. Recently, according to the Green policy in government, the LED fluorescent Lighter showed the rapidly increasing tend as indoor and outdoor Lighter. But, because of costs, LED fluorescent Light not considered and neglected the following items; power factor, efficiency, Harmonics and Inrush current. So, we are developed the SMPS about 3 key issues as follows: 1st, power factor and efficiency is 85%. 2nd, the switching noisy by harmonic is minimized. 3rd, the Inrush current at turn on and off time is reduced the minimum 0.3 A after $100{\mu}sec$ on turnon time. The proposed SMPS adjusted by LNK 409 driver (included the high frequency modulation function). Although, the developed SMPS maintained the about 85% of power factor and efficiency. but, the SMPS must be generated low heat by the variation of minute load current at switching timing. To improve the above weak point, the developed SMPS have the feedback monitoring circuit between input side and output side to maintain the power factor and efficiency. Also, we are studied the time-constant of control circuit to output the constant voltage and current nevertheless the load disturbance of LED lighting. The LED fluorescent Light of 46W is checked the above items.