• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 추계학술대회 논문집
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• pp.142-144
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• 2007

이 논문은 세탁기 모터 구동을 위한 단일 전류 센서 방식에서 3상 전류 복원 방법에 대한 기존 방법에 있어서의 문제점 개선 을 위하여 최소전압 주입 방식 과 Smooth 전압 주입 방식을 제시 하고 인버터에서의 전류 복원 향상을 통한 고조파 와 소음 개선 방법을 제시 하였다. 또한 제시된 방식의 타당성을 검증하기 위한 시뮬레이션 및 실험 결과를 고찰하는 것을 목적으로 한다.

• 조명전기설비학회논문지
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• 제20권3호
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• pp.84-89
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• 2006

고조파에 의한 누전차단기 동작이 계속적으로 보고되어 왔으나 누전차단기 동작을 설명할 수 있는 자료가 없는 실정이다. 본 논문에서는 누전차단기에 대한 고조파 영향을 규명하기 위해 누전차단기 오동작 현황에 대한 조사 및 누전차단기 원인불명 동작이 자주 발생하는 건물에서 고조파를 측정 및 분석하였다. 또한 왜곡된 파형을 발생시킬 수 있는 고조파 합성장치를 이용하여 누전차단기 동작 특성을 시험하였다. 시험결과 3차 고조파가 기본파에 합성되었을 때 가장 작은 값의 누설전류에 누전 차단기가 동작되었고 기본파에 더해진 고조파 차수가 증가할 수 록 누전차단기 동작전류는 증가하였다.

• 전력전자학회논문지
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• 제18권1호
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• pp.103-109
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• 2013

The conventional LCL filter design method of the utility interactive inverter considers only harmonics attenuation of the current injected to the grid. However, in case of utility-interactive inverter with critical load the voltage quality of the critical load should also be considered for LCL filter design. Also, considering cost and volume of LCL filters. it is important to have minimum values of inductance and capacitance as far as the harmonic standards are satisfied. In this paper a LCL filter design method is proposed to satisfy not only the harmonic standards of the grid current during the grid-connected mode but the voltage quality of the critical load during grid-connected mode and stand-alone mode. With the proposed method optimized values of LCL filters could be obtained by applying weighting factor to voltage ripple across the critical load, inductor volume, amount of reactive current and system bandwidth.

• Journal of Power Electronics
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• 제18권4호
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• pp.1178-1189
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• 2018

In grid-connected voltage-source inverters (VSIs), when compared with a simple inductive L filter, the LCL filter has a better performance in attenuating the high frequency harmonics caused by the pulse-width modulation of power switches. However, the resonance peaks generated by the filter inductors and capacitors can make a system unstable. In terms of simplicity and filter design cost, a passive damping method is generally preferred. However, its high power loss and degradation in high frequency harmonic attenuation are significant demerits. In this paper, a mathematical design solution for a passive LCL filter to derive filter parameters suppressing the high frequency current harmonics to 0.3% is proposed. The minimum filter inductance can be obtained to reduce the size of the filter. Furthermore, a minimum damping resistance design considering a current controller is analyzed for a stable closed-loop system. The proposed design method is verified by experimental results using a 5-kW three-phase prototype inverter.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.1088-1091
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• 1992

Programmed PWM(Pulse Width Modulated) generation techniques eliminating several low order harmonics have been widely used in the inverter circuit which produces minimum current ripple, reduced torque pulsation and thereby improves overall system performance. However, the applications of the programmed PWM technique are limited to CVCF(Constant Voltage Constant Frequency) applications and various motor drives. Although the programmed PWM produces a lower harmonic distorted waveform than the carrier modulated PWM, real-time programming is not possible because of the complicated calculation required for the gating signal. In this paper, a new programmed PWM technique named TAM (time averaging model) is developed to compensate for the demerits of the conventional programmed PWM technique with moderate harmonic distortion. Computer simulations are performed to verify the performance of the proposed algorithm.

• Journal of Power Electronics
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• 제15권3호
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• pp.644-651
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• 2015

This paper introduces a novel digital one cycle control (DOCC) boost power factor correction (PFC) converter. The proposed PFC converter realizes the FPGA-based DOCC control approach for single-phase PFC rectifiers without input voltage sensing or a complicated two-loop compensation design. It can also achieve a high power factor and the operation of low harmonic input current ingredients over universal loads in continuous conduction mode. The trailing triangle modulation adopted in this approach makes the acquisition of the average input current an easy process. The controller implementation is based on a boost topology power circuit with low speed, low-resolution A/D converters, and economical FPGA development board. Experimental results demonstrate that the proposed PFC rectifier can obtain a PF value of up to 0.999 and a minimum THD of at least 1.9% using a 120W prototype.

• 대한전자공학회논문지
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• 제26권11호
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• pp.1819-1828
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• 1989

In this paper, we determined the modulation index for minimization of speed ripple and position error using maximum speed ripple (SRF) and maximum position error(PEF) in current source TPWM inverter. Through computer simulation, we compared with total current harmonic distortion, SRF and PEF for square wave modulation method and TPWM method. As a result, it turns out that square wave modulation method is superior to TPWM method of 3 pulses per half cycle in speed ripple and position error contents. And TPWM is better than square wave method when pulse number is more than 5. Also, in these pulse numbers, moduladtion index of minimum speed ripple and munimum position error is 0.91.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 A
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• pp.373-375
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• 1994

In realizing a three-level GTO inverter, we should keep the voltage balancing of DC-link capacitors and consider minimum on/off time of GTO thyristors in order to make the same blocking voltage across each device and to minimize the harmonic components of the output voltage and current. In this raper, a new PWM scheme based on space voltage vectors, by which it is possible to keep neutral-point voltage and avoid narrow pulse, is presented. Experimental results verify that the proposed PWM control scheme is suitable fur hish power and high voltage three-level GTO inverters applied to induction motor drives.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.127-129
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• 1988

Square-wave current source inverter drives suffer from torque pulsation and speed variation at low speed. Attempts to minimize these problems, CSI PWM strategies have been reported. It is shown that these PWM strategies are based on unnecessarily restrictive modulation laws. In this paper, trapezoidal PWM strategy for CSI is investigated theoratically by double fourier series and we proposed Harmonic Speed ripple Factor(HSF) that is independent of motor parameters and load conditions. Speed ripple are considered in T-PWM and square wave inverter by HSF. We obtain modulation index(M) and carrier ratio (CR) for minimum speed ripple.

• KEPCO Journal on Electric Power and Energy
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• 제2권4호
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• pp.577-582
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• 2016

최근 급속한 녹색환경 정책으로 LED를 이용한 조명 광원들이 설치 운용하고 있으나, 이들 광원의 전원 공급은 안정된 직류 전원 공급을 위해서 스위칭 모드 전원 공급(SMPS) 장치로 전원을 공급하고 있다. 그러나, 이들 전원 공급 장치는 공급 단가 때문에 설계 및 설치과정에서 스위칭에 따른 전력과 변환역률, 전기적 노이즈 및 돌입전류들은 간과하고 있다. 따라서, 본 연구에서는 SMPS는 고품질의 전원을 LED 조명 부하에 공급하기 위하여 스위칭 시에 다음과 같은 3가지 관점에서 회로를 연구하였다. 첫 번째, 역률과 효율을 약 85% 확보하고, 두 번째, 노이즈(고조파 포함) 최소화, 세 번째는 스위치-온 시 3A 돌입전류를 $100{\mu}sec$ 후 최소 0.3 A로 감소하여 돌입 전류 침입을 최소화 하고자 하였다. 본 연구에서는 IC형 구동기(LNK 409)를 적용하여 입력전압과 출력상황을 귀환 형태로 감시하도록 하였으며, 정전류 출력을 위하여 정전압을 유지할 수 있는 제어회로와 시상수를 개발하였다. 그러나, 부하 변동 시 미세한 전류의 불규칙으로 인한 발열 문제는 해결하지 못하고 있다. 이를 증명하고자 LED 조명 부하 46 W급을 대상으로 효과를 검증하였다.