• Title/Summary/Keyword: Current circuit

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CMOS Current Sum/Subtract Circuit

  • Parnklang, Jirawath;Manasaprom, Ampual
    • 제어로봇시스템학회:학술대회논문집
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    • 2001.10a
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    • pp.108.6-108
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    • 2001
  • The basic circuit block diagram of CMOS current mode sum and subtract circuit is present in this paper. The purpose circuit consists of the invert current circuit and the basic current mirror. The outputs of the circuit are the summing of the both input current [lx+ly] and also the subtract of the both input current [lx+(-ly)]. The SPICE simulation results of the electrical characteristics with level 7 (BSIM3 model version 3.1) MOSFET transistor model of the circuit such as the input dynamic range, the frequency response and some system application have been shown and analyzed.

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LOW DIRECT-PATH SHORT CIRCUIT CURRENT OF THE CMOS DIGITAL DRIVER CIRCUIT

  • Parnklang, Jirawath;Manasaprom, Ampaul;Laowanichpong, Nut
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.970-973
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    • 2003
  • Abstract An idea to redce the direct-path short circuit current of the CMOS digital integrated circuit is present. The sample circuit model of the CMOS digital circuit is the CMOS current-control digital output driver circuit, which are also suitable for the low voltage supply integrated circuits as the simple digital inverter, are present in this title. The circuit consists of active MOS load as the current control source, which construct from the saturated n-channel and p-channel MOSFET and the general CMOS inverter circuits. The saturated MOSFET bias can control the output current and the frequency response of the circuit. The experimental results show that lower short circuit current control can make the lower frequency response of the circuit.

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A Study on Development of Current Limiting solid-state AC circuit Breaker (한류형 반도체 교류 차단기 개발에 관한 연구)

  • Lee, Woo-Young;Kim, Yong-Joo
    • Proceedings of the KIEE Conference
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    • 1990.11a
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    • pp.73-77
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    • 1990
  • In this paper we describe the solid-state ac-circuit breaker which has the characteristic of both a half cycle circuit breaker and a current limiting circuit breaker. This circuit breaker has a current limiting resistor in order to surprises the fault current to a certain level and discharge the energe included in circuit inductor. We explain the effect of circuit parameter on transient phenomena of switch device by using EMTP and finally design the control circuit consisted synchronous closing circuit, over- current detecting circuit and sensing circuit of rate of rise of fault current.

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Accuracy Enhancement Technique in the Current-Attenuator Circuit (전류 감쇠 조정 회로에서의 정밀도 향상 기술)

  • Kim, Seong-Kweon
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.8
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    • pp.116-121
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    • 2005
  • To realize the tap coefficient of a finite impulse response(FIR) filter or the twiddle factor of a fast Fourier transform(FFT) using a current-mode analog circuit, a high accurate current-attenuator circuit is needed This paper introduces an accuracy enhancement technique in the current-mode signal processing. First of all, the DC of set-current error in a conventional current-attenuator using a gate-ratioed orient mirror circuit is analyzed and then, the current-attenuator circuit with a negligibly small DC offset-current error is introduced. The circuit consists of N-output current mirrors connected in parallel with me another. The output current of the circuit is attenuated to 1/N of the input current. On the basis of the Kirchhoff current law, the current scale ratio is determined simply by the number of the current mirrors in the N-current mirrors connected in parallel. In the proposed current-attenuator circuit the scale accuracy is limited by the ac gain error of the current mirror. Considering that a current mirror has a negligibly small ac gain error, the attainable maximum scale accuracy is theoretically -80[dB] to the input current.

Three-phase Fault Calculation by IEC 60909 (IEC 60909에 의한 삼상 고장계산)

  • Son, Seok-Geum
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.63 no.1
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    • pp.12-18
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    • 2014
  • This paper analyzes how to calculate the three phase short circuit current calculation procedures used in the IEC 60909 short circuit. It presented the new procedure of the fault current for the interrupting capacity of the circuit breaker. This procedure is applied to the future power system and calculates the fault current. Power demands are increased because of the growth of the economy for this reason, the fault current of the power system is largely increased and the fault current procedure for the proper interrupting capacity calculation of the existing or the new circuit breaker is essential. How to calculate the three phase short circuit current for ac electrical system and select the high voltage and low voltage circuit breaker based on IEC 60909 standards.

Analysis on Fault Current Limiting Characteristics of Flux-Lock Type SFCL Using Magnetic Flux Application Circuit (자기인가회로를 이용한 자속구속형 초전도한류기의 고장전류제한 특성 분석)

  • Go, Ju-Chan;Lim, Seung-Taek;Lim, Sung-Hun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.1
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    • pp.37-41
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    • 2017
  • In this paper, the fault current limiting characteristics of the flux-lock type SFCL (superconducting fault current limiter) using magnetic application circuit were analyzed. The flux-lock type SFCL has the structure to install the magnetic application circuit, which can increase the resistance of HTSC ($high-T_C$ superconducting element comprising) the SFCL. To analyze the fault current limiting effect of the flux-lock type SFCL through the magnetic flux application circuit, the flux-lock type SFCL either with the magnetic flux circuit or without the magnetic flux circuit was constructed and the fault current limiting characteristics of the SFCL were compared each other through the short-circuit tests.

Interruption analysis of the SFCL-combined DC circuit breaker system using current-limiting technology

  • Kim, Jun-Beom;Jeong, In-Sung;Choi, Hye-Won;Choi, Hyo-Sang
    • Progress in Superconductivity and Cryogenics
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    • v.18 no.4
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    • pp.30-34
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    • 2016
  • In this study, a SFCL-combined DC circuit breaker system was proposed by applying the current-limiting technology for DC circuit breaking. The SFCL-combined circuit breaker system consists of a mechanical DC circuit breaker combined with superconductors. To ensure the reliable structure and operation of the SFCL-combined circuit breaker system, a simulation grid was designed using the EMTDC/PSCAD program, and simulation was conducted. The results showed that the SFCL-combined DC circuit breaker system with superconductors limited the maximum fault current by 37%. In addition, the burden on the DC circuit breaker was decreased by 87%.

Short-circuit Protection Circuit Design for SiC MOSFET Using Current Sensing Circuit Based on Rogowski Coil (Rogowski Coil 기반의 전류 센싱 회로를 적용한 SiC MOSFET 단락 보호 회로 설계)

  • Lee, Ju-A;Byun, Jongeun;Ann, Sangjoon;Son, Won-Jin;Lee, Byoung-Kuk
    • The Transactions of the Korean Institute of Power Electronics
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    • v.26 no.3
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    • pp.214-221
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    • 2021
  • SiC MOSFETs require a faster and more reliable short-circuit protection circuit than conventional methods due to narrow short-circuit withstand times. Therefore, this research proposes a short-circuit protection circuit using a current-sensing circuit based on Rogowski coil. The method of designing the current-sensing circuit, which is a component of the proposed circuit, is presented first. The integrator and input/output filter that compose the current-sensing circuit are designed to have a wide bandwidth for accurately measuring short-circuit currents with high di/dt. The precision of the designed sensing circuit is verified on a double pulse test (DPT). In addition, the sensing accuracy according to the bandwidth of the filters and the number of turns of the Rogowski coil is analyzed. Next, the entire short-circuit protection circuit with the current-sensing circuit is designed in consideration of the fast short-circuit shutdown time. To verify the performance of this circuit, a short-circuit test is conducted for two cases of short-circuit conditions that can occur in the half-bridge structure. Finally, the short-circuit shutdown time is measured to confirm the suitability of the proposed protection circuit for the SiC MOSFET short-circuit protection.

Design and Analysis of 20 W Class LED Converter Considering Its Control Method (제어 방식에 따른 20 W급 LED Converter 설계 및 분석)

  • Jeong, Young-Gi;Kim, Sung-Hyun;Park, Dae-Hee
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.1
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    • pp.53-57
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    • 2012
  • In this paper, by designing 20 W class driving circuit for driving high-power LED (Light Emitting Diode), we are going to comparatively carry out the analysis of characteristics for power circuit according to each design method. In this case, 200 V 60 Hz was performed as input data. The electrical characteristics such as voltage, current and ripple are checked for constant current circuit and constant voltage circuit in the LED module. In addition, as the ripple has an influence on illumination of LED light, low temperature working (-20 [$^{\circ}C$]) and high temperature working(80 [$^{\circ}C$]) are measured to make sure the ripple characteristics in accordance with temperature. In low temperature operation -20 [$^{\circ}C$] measurements, both constant current circuit and constant-voltage circuit were less impacted on input fluctuation, whereas in the high temperature operation 80 [$^{\circ}C$], current voltage in constant voltage circuit was surge after 430 [hour]. Voltage current ripple of constant current circuit was much less than constant voltage circuit, therefore we can show that constant current circuit is more stable.

Current Distribution Factor Based Fault Location Algorithms for Double-circuit Transmission Lines (전류분배계수를 사용하는 병행 2회선 송전선로 고장점 표정 알고리즘)

  • Ahn, Yong-Jin;Kang, Sang-Hee;Choi, Myeon-Song;Lee, Seung-Jae
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.50 no.3
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    • pp.146-152
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    • 2001
  • This paper describes an accurate fault location algorithm based on sequence current distribution factors for a double-circuit transmission system. The proposed method uses the voltage and current collected at only the local end of a single-circuit. This method is virtually independent of the fault resistance and the mutual coupling effect caused by the zero-sequence current of the adjacent parallel circuit and insensitive to the variation of source impedance. The fault distance is determined by solving the forth-order KVL(Kirchhoff's Voltage Law) based distance equation. The zero-sequence current of adjacent circuit is estimated by using a zero-sequence current distribution factor and the zero-sequence current of the self-circuit. Thousands of fault simulation by EMTP have proved the accuracy and effectiveness of the proposed algorithm.

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