• Title/Summary/Keyword: Current Mirror

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A Study on the temperature sensing circuit using MOS applicable for the IC internal temperature measurement (IC 내부 온도측정이 가능한 MOS 온도센싱 회로에 관한 연구)

  • Kang, Byung-jun;Lee, Min-woo;Kim, Han-seul;Han, Jung-woo;Son, Sang-hee;Jung, on-sup
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.695-697
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    • 2013
  • In this paper, temperature sensing circuit using by MOS is proposed. It produces the voltage as output and is applicable for the internal IC temperature measurement. It is designed by two current mirrors using MOS to implement the IC in the CMOS fabrication and is applicable for the various applications. It operates in two mode, temperature mode and sleep mode. From the simulation results, output voltage is measured from 0V to 1.2V by sweeping $0^{\circ}C{\sim}125^{\circ}C$ in temperature mode and output current flows under 100pA in sleep mode.

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The 4bit Cell Array Structure of PoRAM and A Sensing Method for Drive this Structure (PoRAM의 4bit 셀 어레이 구조와 이를 동작시키기 위한 센싱 기법)

  • Kim, Jung-Ha;Lee, Sang-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.6 s.360
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    • pp.8-18
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    • 2007
  • In this paper, a 4bit cell way structure of PoRAM and the sensing method to drive this structure are researched. PoRAM has a different operation from existing SRAM and DRAM. The operation is that when certain voltage is applied between top electrode and bottom electrode of PoRAM device we can classify the cell state by measuring cell current which is made by changing resistance of the cell. In the decoder selected by new-addressing method in the cell array, the row decoder is selected "High" and the column decoder is selected "Low" then certain current will flow to the bit-line. Because this current is detect, in order to make large enough current, the voltage sense amplifier is used. In this case, usually, 1-stage differential amplifier using current mirror is used. Furthermore, the detected value at the cell is current, so a diode connected NMOSFET, that is, a device resistor is used at the input port of the differential amplifier to converter current into voltage. Using this differential amplifier, we can classify the cell states, erase mode is "Low" and write mode is "High", by comparing the input value, Vin, that is a product of current value multiplied by resistor value with a reference voltage, Vref.

A study on L/T reduction with the automatic start of SETUP environment designing PCB (PCB 설계 SETUP 환경 자동실행으로 L/T 단축에 대한 연구)

  • Lee, Sang-Ho;Kim, Young-Kil
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.05a
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    • pp.303-306
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    • 2012
  • According to the rapid development of cell phone and camera industry, all of electronic products obtain small-size, high-performance and variety. Therefore, PCB also obtains high-integration, multi-layers and high-specification rapidly. Among the digital cameras which are continuously evolved and developed, the market of mirror-less camera and hybrid digital camera is continuously increased because of the customer's request for small-size and weight lightening, except for DSLR camera. Therefore, the difficulty of PCB design is gradually increased and design L/T is longer according to the high-specifications, low-current and high-performance components. This thesis suggests the method to reduce L/T for PCB design applied to the reduction of digital camera's developing period and manufacturing period.

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Design of CMOS Optical Link Receiver for FTTH (FTTH용 CMOS Optical Link Receiver의 설계)

  • Kim Kyu-Chull
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.1
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    • pp.47-52
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    • 2004
  • This paper presents a CMOS optical receiver design featuring wide input dynamic range and low bit error rate suitable for FTTH application. We achieved 60dB input dynamic range for up to 100Mbps by controlling the PMOS feedback resistance of transimpedance preamplifier according to its output signal level. Auto-bias circuit is designed in current mirror configuration to minimize duty error. Circuit simulation has been performed using 2-poly, 3-metal, 0.6um CMOS process parameters. The designed receiver consumes less than 130mW at 100Mbps with 5V power supply.

A study on pcb lead time reduction with the automatic start of environment designing cad allegro (CAD Allegro을 이용한 환경 자동실행으로 PCB작업시간 단축에 대한 연구)

  • Lee, Sang-Ho;Kim, Young-Gil
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.6
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    • pp.1204-1208
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    • 2012
  • According to the rapid development of cell phone and camera industry, all of electronic products obtain small-size, high-performance and variety. Therefore, PCB also obtains high-integration, multi-layers and high-specification rapidly. Among the digital cameras which are continuously evolved and developed, the market of mirror-less camera and hybrid digital camera is continuously increased because of the customer's request for small-size and weight lightening, except for DSLR camera. Therefore, the difficulty of PCB design is gradually increased and design L/T is longer according to the high-specifications, low-current and high-performance components. This thesis suggests the method to reduce L/T for PCB design applied to the reduction of digital camera's developing period and manufacturing period.

Design and Fabrication of 0.5 V Two Stage Operational Amplifier Using Body-driven Differential Input Stage and Self-cascode Structure (바디 구동 차동 입력단과 Self-cascode 구조를 이용한 0.5 V 2단 연산증폭기 설계 및 제작)

  • Gim, Jeong-Min;Lee, Dae-Hwan;Baek, Ki-Ju;Na, Kee-Yeol;Kim, Yeong-Seuk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.4
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    • pp.278-283
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    • 2013
  • This paper presents a design and fabrication of 0.5 V two stage operational amplifier. The proposed operational amplifier utilizes body-driven differential input stage and self-cascode current mirror structure. Cadence Virtuoso is used for layout and the layout data is verified by LVS through Mentor Calibre. The proposed two stage operational amplifier is fabricated using $0.13{\mu}m$ CMOS process and operation at 0.5 V is confirmed. Measured low frequency small signal gain of operational amplifier is 50 dB, power consumption is $29{\mu}W$ and chip area is $75{\mu}m{\times}90{\mu}m$.

Design of the nonlinearly chirped grating for broadly tunable semiconductor lasers (넓은 파장 가변영역을 가지는 반도체 레이저를 위한 Nonlinearly Chirped Grating의 설계)

  • 김덕봉;최안식;윤태훈;김재창;김선호
    • Korean Journal of Optics and Photonics
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    • v.7 no.4
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    • pp.370-374
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    • 1996
  • A Superstructure Grating(SSG) Distributed-Bragg-Reflector(DBR) laser has a broad tuning range with a good mode suppression ratio. However, gaps of channel are observed in the wavelength-tuning characteristics of an SSGDBR laser which employs linearly-chirped DBR mirrors. We found by numerical simulation that the gaps may be attributed to the nonuniform reflection-peak heights of a linearly-chirped DBR mirrors. We propose a nonlinearly chirped grating DBR mirror structure that makes reflection-peak heights almost uniform. Therefore a nonlinearly chirped grating structure can be employed in an extended tuning range semiconductor laser to achieve gap-free tuning and low threshold current operation simultaneously.

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CONSTRUCTION OF THE BOAO ECHELLE SPECTROGRAPH (BOES) (보현산천문대 고분산 에셀분광기(BOES) 제작)

  • KIM KANG-MIN;JANG JEONG GYUN;CHUN MOO-YOUNG;PARK BYEONG-GON;HYUNG SIEK;HAN INWOO;YOON TAE SEOG;VOGT STEVEN S.
    • Publications of The Korean Astronomical Society
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    • v.15 no.spc1
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    • pp.119-126
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    • 2000
  • The BOES (BOAO Echelle Spectrograph), a fiber-fed echelle spectrograph of the BOAO 1.8 m telescope, has been designed and now is being manufactured. The BOES follows a white pupil design collimated with two off-axis parabolic mirrors. The 136mm collimating beam leaving the 41.59 grooves/mm R4 echelle grating is refocused near the narrow folding mirror. Through the two cross-disperser prisms and $\phi250 mm(f/1.5)$ transmission camera, the beam images on EEV $2k\times4k$ CCD. The BOES can take the wavelength range of 3700 to $10100{\AA}$ at a single spot with spectral resolution R = 20000 to 40000 depending on the fiber set employed. We describe the key sciences and performance, current status of construction, and future plan of the BOES.

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The Symbolic Meaning and Values Portrayed In Models' Characteristics in Fashion Advertisements

  • Kwon, Gi-Young;Helvenston, Sally I.
    • International Journal of Human Ecology
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    • v.7 no.2
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    • pp.29-41
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    • 2006
  • Various current events provide evidence that society is undergoing changes in perceptions of social relationships. Specifically, visual media in the form of advertisements can convey images which reflect society's values and concepts about role relationships. The purpose of this research was to examine ads in fashion magazines to determine what types of model roles and role relationships typically appear in fashion advertising which can mirror society's values. A content analysis was conducted of ads obtained from US Vogue and US GQ for the year 2002. Six kinds of roles/relationships were found: (1) Narcissism (representing self absorption), (2) sexually enticing opposite-sex relationships, (3) close/romantic same-sex relationships, (4) friend relationships, (5) family relationships, and (6) independent relationships. Of these, narcissism predominated, however, a small number of sexually provocative ads appeared as well as same-sex romantic relationships. Because sole (single) models were more typical, they also were examined to determine ways in which they relate to the audience. Characteristics examined included body presentation & pose, eye gaze, and facial expression. Direct eye gaze was the typical way to engage the audience. Gender differences were apparent: smiling was more typical of women, indifference for men. The symbolic meaning and values investigated from this research are the blurring of gender identity portrayed in homosexual imagery, family values, and the value of youth. The consistency of models' race in ads does not portray the diversity reflected in the demographic census.

Advanced Circuit-Level Model of Magnetic Tunnel Junction-based Spin-Torque Oscillator with Perpendicular Anisotropy Field

  • Kim, Miryeon;Lim, Hyein;Ahn, Sora;Lee, Seungjun;Shin, Hyungsoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.6
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    • pp.556-561
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    • 2013
  • Interest in spin-torque oscillators (STOs) has been increasing due to their potential use in communication devices. In particular the magnetic tunnel junction-based STO (MTJ-STO) with high perpendicular anisotropy is gaining attention since it can generate high output power. In this paper, a circuit-level model for an in-plane magnetized MTJ-STO with partial perpendicular anisotropy is proposed. The model includes the perpendicular torque and the shift field for more accurate modeling. The bias voltage dependence of perpendicular torque is represented as quadratic. The model is written in Verilog-A, and simulated using HSPICE simulator with a current-mirror circuit and a multi-stage wideband amplifier. The simulation results show the proposed model can accurately replicate the experimental data such that the power increases and the frequency decreases as the value of the perpendicular anisotropy gets close to the value of the demagnetizing field.