Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of CMOS Optical Link Receiver for FTTH

FTTH용 CMOS Optical Link Receiver의 설계

  • 김규철 (단국대학교 전자컴퓨터공학과)
  • Published : 2004.01.01
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Abstract

This paper presents a CMOS optical receiver design featuring wide input dynamic range and low bit error rate suitable for FTTH application. We achieved 60dB input dynamic range for up to 100Mbps by controlling the PMOS feedback resistance of transimpedance preamplifier according to its output signal level. Auto-bias circuit is designed in current mirror configuration to minimize duty error. Circuit simulation has been performed using 2-poly, 3-metal, 0.6um CMOS process parameters. The designed receiver consumes less than 130mW at 100Mbps with 5V power supply.

본 논문에서는 FTTH에 적용하기 적합한 넓은 입력 다이나믹 레인지와 낮은 비트 에러율을 갖는 CMOS 광수신기의 설계를 제안한다. 트랜스임피던스 전치증폭기의 PMOS 피드백 저항을 자신의 출력 신호의 크기에 따라 제어하여 100Mbps까지 60dB의 입력 다이나믹 레인지를 얻었다. 듀티 에러를 최소화시키기 위해 전류 거울 형태의 자동 바이어스 조절 회로를 설계하였다. 2-폴리, 3-메탈, 0.6um CMOS 공정 파라미터를 사용하여 회로 시뮬레이션을 수행하였다. 설계된 수신기는 5V의 전원을 사용할 때 100Mbps에서 130mW 이하의 전력 소비를 보였다.

Keywords

References

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