• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.8
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• pp.116-121
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• 2005

To realize the tap coefficient of a finite impulse response(FIR) filter or the twiddle factor of a fast Fourier transform(FFT) using a current-mode analog circuit, a high accurate current-attenuator circuit is needed This paper introduces an accuracy enhancement technique in the current-mode signal processing. First of all, the DC of set-current error in a conventional current-attenuator using a gate-ratioed orient mirror circuit is analyzed and then, the current-attenuator circuit with a negligibly small DC offset-current error is introduced. The circuit consists of N-output current mirrors connected in parallel with me another. The output current of the circuit is attenuated to 1/N of the input current. On the basis of the Kirchhoff current law, the current scale ratio is determined simply by the number of the current mirrors in the N-current mirrors connected in parallel. In the proposed current-attenuator circuit the scale accuracy is limited by the ac gain error of the current mirror. Considering that a current mirror has a negligibly small ac gain error, the attainable maximum scale accuracy is theoretically -80[dB] to the input current.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.13-20
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• 2001

In this appear, we proposed the new current mirror has large output resistance and excellent current matching characteristics. If supply voltage were lowered under the conventional CMOS operational amplifier, the wing of out put power could be restricted. So, the paper suggests a new way of differential operational amplifier circuit to solve the problem. The paper proposes that a new current mirror increases output swing and has a stable operation. We compare and verify characteristics of the proposed current mirror with the cascoded current mirror and the regulated current mirror through simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.4
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• pp.93-103
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• 2002

A new current mirror for high-accuracy current-mode signal processing and integrated circuit design was proposed. The current mirror adopts the technique of an adaptive feedback to reduce the input impedance and the output stage of regulated cascode current mirror to increase the output impedance. Simulation results show that the current mirror has input impedance of 0.9Ω, the output impedance of 415 MΩ, and current gain of 0.96 at the supply voltage Vcc=5V. The power dissipation is 1.5㎽. In order to certify the applicability of the proposed current mirror, a voltage-to-current converter using the current mirror is designed. Simulation results show that the converter has good agreement with theoretical equation and has three times better conversion characteristics when compared with voltage-to-current converter using Wilson current mirror.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.84-87
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• 2006

본 연구는 Current Mirror에 있어서 Active Current Bias에 관하여 기술하였다. Current mirror에서 Active Current Bias를 걸어주는 보편적인 방법은 Current Bias단에 저항을 연결하여 저항값을 조절함으로 해서 Current를 제어하는 방법을 사용한다. Reference 전류를 제어하는데 있어 새로이 제안하는 것은 Flyback Converter를 이용하여 Acitve Current Bias를 제어 하려 한다. 트랜지스터를 이용하여 Current Mirror Circuit를 구성하고 Current Bias 측에 Flyback Converter Circuit을 연결한다. Flyback Converter의 PWM의 Duty Ratio를 조절함으로 해서 전류를 제어하는 특징을 이용하여 Active Current Bias를 제어한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.54-59
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• 2008

A highly accurate wide swing BiCMOS cascode current mirror is proposed. It uses the base-current compensated BJT current mirror. It increases both output impedance and output voltage range by using the npn-NMOS cascode instead of the NMOS-NMOS cascode. The npn transistor copies the input current and the NMOS transistor increases the output impedance for the accurate current mirroring. The proposed current mirror achieves highly constant current for wide output voltage range. Simulation results were verified with measurements performed on a fabricated chip using a 5/16V 0.5um BCD process. It has only $-2.5%{\sim}1.0%$ current error for $0.3V{\sim}16V$ output voltage range.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.79-85
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• 2009

In this paper, an accurate current reference using temperature and process compensation current mirror (TPC-CM) is proposed. The temperature independent reference current is generated by summing a proportional to absolute temperature (PTAT) current and a complementary to absolute temperature (CTAT) current. However, the temperature coefficient and magnitude of the reference current are influenced by the process variation. To calibrate the process variation, the proposed TPC-CM uses two binary weighted current mirrors which control the temperature coefficient and magnitude of the reference current. After the PTAT and CTAT current is measured, the switch codes of the TPC-CM is fixed in order that the magnitude of reference current is independent to temperature. And, the codes are stored in the non-volatile memory. In the simulation, the effect of the process variation is reduced to 0.52% from 19.7% after the calibration using a TPC-CM in chip-by-chip. A current reference chip is fabricated with a 3.3V 0.35um CMOS process. The measured calibrated reference current has 0.42% variation for $20^{\circ}$C${\sim}$100$^{\circ}$C.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1642-1645
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• 2007

The brightness of LED changes according to the current flowing through LEDs. The current mirror was used to drive LEDs effectively. The reference current of the current mirror was usually controlled by the resistor but the size of this resistor is very large and this resistor consumes too much power for high power LED backlight driving. The reference current of the current mirror LED driver was controlled by using flyback converter at small size with low power consumption in this paper. The concept of active current source was presented.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.5
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• pp.403-411
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• 2020

Since the analog circuit of the beta ray sensor circuit for the true random number generator and the power and ground line used in the comparator circuit are shared with each other, the power generated by the digital switching of the comparator circuit and the voltage drop at the ground line was the cause of the decreasein the output signal voltage drop at the analog circuit including CSA (Charge Sensitive Amplifier). Therefore, in this paper, the output signal voltage of the analog circuit including the CSAcircuit is reduced by separating the power and ground line used in the comparator circuit, which is the source of digital switching noise, from the power and ground line of the analog circuit. In addition, in the voltage-to-voltage converter circuit that converts VREF (=1.195V) voltage to VREF_VCOM and VREF_VTHR voltage, there was a problem that the VREF_VCOM and VREF_VTHR voltages decrease because the driving current flowing through each current mirror varies due to channel length modulation effect at a high voltage VDD of 5.5V when the drain voltage of the PMOS current mirror is different when driving the IREF through the PMOS current mirror. Therefore, in this paper, since the PMOS diode is added to the PMOS current mirror of the voltage-to-voltage converter circuit, the voltages of VREF_VCOM and VREF_VTHR do not go down at a high voltage of 5.5V.

• Current Optics and Photonics
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• v.1 no.6
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• pp.618-625
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• 2017

In the present research, a new bending system using a segmented vacuum chuck for Stressed Mirror Polishing (SMP) is developed. SMP is a special fabrication method for thin aspheric mirrors, where simple flat or spherical fabrication is applied while a mirror blank is deflected. Since a mirror blank is usually glued to a bending fixture in the conventional SMP process, there are drawbacks such as long curing time, inconvenience of mirror replacement, risk of mirror breakage, and stress concentration near the glued area. To resolve the drawbacks, a new bending system is designed to effectively hold a mirror blank by vacuum. For the developed bending system, the optimal bending load to achieve the designated mirror deflection is found by finite element analysis and an optimization algorithm. With the measurement results of the deflected mirror surfaces with the optimal bending loads, the feasibility of the developed bending system is investigated. As a result, it is shown that the bending system is appropriate for the SMP process.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.6
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• pp.72-76
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• 2003

We developed a polarimetric fiber-optic current sensor using a length of twisted fiber and a Faraday rotator mirror which was used to suppress the linear birefringence effect. A gold coated mirror was also used as the sensor coil reflector, and the results were compared with the case of FRM. From the experimental results, it is clear that the FRM greatly enhances the stability of the fiber optic current sensor output..