• Title/Summary/Keyword: Current Balancing Technique

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Transformer-less CCFL Driver for LCD Backlight (LCD 백라이트용 트랜스포머 없는 냉음극관(CCFL) 구동 회로)

  • Choi Eun-Seok;Yoon Hyun-Ki;Moon Gun-Woo;Youn Myung-Joong;Kang Moon-Shik
    • Proceedings of the KIPE Conference
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    • 2006.06a
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    • pp.81-83
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    • 2006
  • The conventional cold cathode fluorescent lamp (CCFL) driver for LCD TV has a transformer for each lamp to step up the high sinusoidal waveform from the low input voltage. The transformer used in the conventional topology causes the driver to have bulky size and high cost. This paper proposes a new transformer-less CCFL driver for LCD backlight that is based on the parallel-loaded resonant inverter topology. This resonant topology enables the circuit to supply enough high voltage for CCFL without a transformer. Also, with current-balancing technique, this transformer-less inverter drives 16 CCFL lamps.

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Design of a Charge Equalizer Based on Battery Modularization

  • Park, Hong-Sun;Kim, Chol-Ho;Moon, Gun-Woo
    • Proceedings of the KIPE Conference
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    • 2008.06a
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    • pp.413-415
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    • 2008
  • The charge equalizer design for a series connected battery string is very challenging because it needs to satisfy many requirements such as implementation possibility, equalization speed, equalization efficiency, controller complexity, size and cost issues, voltage and current stress, and so on. Numerous algorithms and circuits were developed to meet the above demands and some interesting results have been obtained through them. However, for a large number of cells, for example, eighty or more batteries, the previous approaches might cause problems. Such problems include long equalization time, high controller complexity, bulky size, high implementation cost, and high voltage and current stress. To overcome these circumstances, this paper proposes a charge equalizer design method based on a battery modularization technique. In this method, the number of cells that we consider in an equalizer design procedure can be effectively reduces; thus, designing a charge equalizer becomes much easier. Furthermore, by applying the previously verified charge equalizers to the intramodule and the outer-module, we can obtain easy design of a charge equalizer and good charge balancing performance. Several examples and experimental results are presented to demonstrate the usefulness of the charge equalizer design method.

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Analysis and Control of a Modular MV-to-LV Rectifier based on a Cascaded Multilevel Converter

  • Iman-Eini, Hossein;Farhangi, Shahrokh;Khakbazan-Fard, Mahboubeh;Schanen, Jean-Luc
    • Journal of Power Electronics
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    • v.9 no.2
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    • pp.133-145
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    • 2009
  • In this paper a modular high performance MV-to-LV rectifier based on a cascaded H-bridge rectifier is presented. The proposed rectifier can directly connect to the medium voltage levels and provide a low-voltage and highly-stable DC interface with the consumer applications. The input stage eliminates the necessity for heavy and bulky step-down transformers. It corrects the input power factor and maintains the voltage balance among the individual DC buses. The second stage includes the high frequency parallel-output DC/DC converters which prepares the galvanic isolation, regulates the output voltage, and attenuates the low frequency voltage ripple ($2f_{line}$) generated by the first stage. The parallel-output converters can work in interleaving mode and the active load-current sharing technique is utilized to balance the load power among them. The detailed analysis for modeling and control of the proposed structure is presented. The validity and performance of the proposed topology is verified by simulation and experimental results.

Input-Series-Output-Parallel Connected DC/DC Converter for a Photovoltaic PCS with High Efficiency under a Wide Load Range

  • Lee, Jong-Pil;Min, Byung-Duk;Kim, Tae-Jin;Yoo, Dong-Wook;Yoo, Ji-Yoon
    • Journal of Power Electronics
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    • v.10 no.1
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    • pp.9-13
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    • 2010
  • This paper proposes an input-series-output-parallel connected ZVS full bridge converter with interleaved control for photovoltaic power conditioning systems (PV PCS). The input-series connection enables a fully modular power-system architecture, where low voltage and standard power modules can be connected in any combination at the input and/or at the output, to realize any given specifications. Further, the input-series connection enables the use of low-voltage MOSFETs that are optimized for a very low RDSON, thus, resulting in lower conduction losses. The system costs decrease due to the reduced current, and the volumes of the output filters due to the interleaving technique. A topology for a photovoltaic (PV) dc/dc converter that can dramatically reduce the power rating and increase the efficiency of a PV system by analyzing the PV module characteristics is proposed. The control scheme, consisting of an output voltage loop, a current loop and input voltage balancing loops, is proposed to achieve input voltage sharing and output current sharing. The total PV system is implemented for a 10-kW PV power conditioning system (PCS). This system has a dc/dc converter with a 3.6-kW power rating. It is only one-third of the total PV PCS power. A 3.6-kW prototype PV dc/dc converter is introduced to experimentally verify the proposed topology. In addition, experimental results show that the proposed topology exhibits good performance.

A Study on the CCFL Parallel Driving Circuit for the large LCD TV (대화면 LCD TV용 CCFL 병렬 구동에 관한 연구)

  • Jang, Young-Su;Yoon, Seok;Kweon, Gie-Hyoun;Han, Sang-Kyoo;Hong, Sung-Soo;Sakong, Suk-Chin;Roh, Chung-Wook
    • The Transactions of the Korean Institute of Power Electronics
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    • v.11 no.5
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    • pp.454-462
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    • 2006
  • To enhance the competitive edge of the material cost, various techniques lowering the material cost of inverter to drive Cold Cathode Fluorescent Lamp (CCFL) have been developed. In this paper, the theoretical analysis has been done for the existing techniques such as Jin Balance and O2Micro technique. Especially, How to design the value of magnetizing inductance to meet the specification of the lamp current tolerance between lamps has been disclosed. Based on this result, two kinds of hybrid type balancing techniques have been proposed and analyzed mathematically, Also, the accuracy of the proposed techniques has been verified through Pspice simulation.

A Non-isolated High Step-up DC/DC Converter with Low EMI and Voltage Stress for Renewable Energy Applications

  • Baharlou, Solmaz;Yazdani, Mohammad Rouhollah
    • Journal of Electrical Engineering and Technology
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    • v.12 no.3
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    • pp.1187-1194
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    • 2017
  • In this paper, a high step-up DC-DC PWM converter with continuous input current and low voltage stress is presented for renewable energy application. The proposed converter is composed of a boost converter integrated with an auxiliary step-up circuit. The auxiliary circuit uses an additional coupled inductor and a balancing capacitor with voltage doubler and switching capacitor technique to achieve high step-up voltage gain with an appropriate switch duty cycle. The switched capacitors are charged in parallel and discharged in series by the coupled inductor, stacking on the output capacitor. In the proposed converter, the voltage stress on the main switch is clamped, so a low voltage switch with low ON resistance can be used to reduce the conduction loss which results in the efficiency improvement. A detailed discussion on the operating principle and steady-state analyses are presented in the paper. To justify the theoretical analysis, experimental results of a 200W 40/400V prototype is presented. In addition, the conducted electromagnetic emissions are measured which shows a good EMC performance.

DC-Link Voltage Balance Control Using Fourth-Phase for 3-Phase 3-Level NPC PWM Converters with Common-Mode Voltage Reduction Technique

  • Jung, Jun-Hyung;Park, Jung-Hoon;Kim, Jang-Mok;Son, Yung-Deug
    • Journal of Power Electronics
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    • v.19 no.1
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    • pp.108-118
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    • 2019
  • This paper proposes a DC-link voltage balance controller using the fourth-phase of a three-level neutral-point clamped (NPC) PWM converter with medium vector selection (MVS) PWM for common-mode voltage reduction. MVS PWM makes the voltage reference by synthesizing the voltage vectors that cannot generate common-mode voltage. This PWM method is effective for reducing the EMI noise emitted from converter systems. However, the DC-link voltage imbalance problem is caused by the use of limited voltage vectors. Therefore, in this paper, the effect of MVS PWM on the DC-link voltage of a three-level NPC converter is analyzed. Then a proportional-derivative (PD) controller for the DC-link voltage balance is designed from the DC-link modeling. In addition, feedforward compensation of the neutral point current is included in the proposed PD controller. The effectiveness of the proposed controller is verified by experimental results.

A Study on the Scope of the Development of Ship Communication in the GMDSS (GMDSS도입에 따른 선박통신의 발전방향에 관한 연구)

  • 신현식;김기문
    • Journal of the Korean Institute of Navigation
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    • v.18 no.1
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    • pp.39-61
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    • 1994
  • GMDSS(the Global Maritime Distress and Safety System), which is utilizing recently developed systems such as satellite communications and positioning system, digital communication system, computer and microelectronics technology, etc., has been adopted by International Maritime Orgnization(IMO) and coordina-ted with such organization as the International Telecommunication Union(ITU), World Meteorological Organizatoion(WMO), etc. This system took effect partly on February 1st 1992 according to the 1988 SOLAS Amemdments and, after some more complementary measures, will be fully operational by February 1st 1999. Comparing with the existing communication system, the new system is mainly based on the latest scientific technologies, and therefore overall countermeasure will be necessary to accept the system reasonably. GMDSS will transform the current communication system basically and be the major factor to change the demand and supply of personnel for radio communication. To cope with the system assertively, regulations relating to the radio installation, the posting of radio operators, the bounds of their duty, etc. must be established and the demand and supply of radio operators to meet the system must be accomplished pertinently. Moreover, the technique and quality of the person-nel responsible for the system must be upgraded to carry out the obligations by international regulations as well as to ensure the safety of life and property at sea. Looking into the actual situations of our country, every regulation relating to the GMDSS has been improved, but the concerned educational institutions and administrations have not yet prepared the rational and concrete schemes on the educational methods and adquate procedures for the system. Therefore, in this thesis, the author intends to propose directions for improving the courses and contents of education of the relating educational institutions and to suggest rational schemes for balancing the demand and supply of personnel to the administrative anthorty concerned.

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Implementation of Parallel Volume Rendering Using the Sequential Shear-Warp Algorithm (순차 Shear-Warp 알고리즘을 이용한 병렬볼륨렌더링의 구현)

  • Kim, Eung-Kon
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.6
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    • pp.1620-1632
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    • 1998
  • This paper presents a fast parallel algorithm for volume rendering and its implementation using C language and MPI MasPar Programming Language) on the 4,096 processor MasPar MP-2 machine. This parallel algorithm is a parallelization hased on the Lacroute' s sequential shear - warp algorithm currently acknowledged to be the fastest sequential volume rendering algorithm. This algorithm reduces communication overheads by using the sheared space partition scheme and the load balancing technique using load estimates from the previous iteration, and the number of voxels to be processed by using the run-length encoded volume data structure.Actual performance is 3 to 4 frames/second on the human hrain scan dataset of $128\times128\times128$ voxels. Because of the scalability of this algorithm, performance of ]2-16 frames/sc.'cond is expected on the 16,384 processor MasPar MP-2 machine. It is expected that implementation on more current SIMD or MIMD architectures would provide 3O~60 frames/second on large volumes.

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Real-Time Monitoring and Buffering Strategy of Moving Object Databases on Cluster-based Distributed Computing Architecture (클러스터 기반 분산 컴퓨팅 구조에서의 이동 객체 데이타베이스의 실시간 모니터링과 버퍼링 기법)

  • Kim, Sang-Woo;Jeon, Se-Gil;Park, Seung-Yong;Lee, Chung-Woo;Hwang, Jae-Il;Nah, Yun-Mook
    • Journal of Korea Spatial Information System Society
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    • v.8 no.2 s.17
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    • pp.75-89
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    • 2006
  • LBS (Location-Based Service) systems have become a serious subject for research and development since recent rapid advances in wireless communication technologies and position measurement technologies such as global positioning system. The architecture named the GALIS (Gracefully Aging Location Information System) has been suggested which is a cluster-based distributed computing system architecture to overcome performance losses and to efficiently handle a large volume of data, at least millions. The GALIS consists of SLDS and LLDS. The SLDS manages current location information of moving objects and the LLDS manages past location information of moving objects. In this thesis, we implement a monitoring technique for the GALIS prototype, to allow dynamic load balancing among multiple computing nodes by keeping track of the load of each node in real-time during the location data management and spatio-temporal query processing. We also propose a buffering technique which efficiently manages the query results having overlapped query regions to improve query processing performance of the GALIS. The proposed scheme reduces query processing time by eliminating unnecessary query execution on the overlapped regions with the previous queries.

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