• Title/Summary/Keyword: Cu/Sn/Cu bump

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Studies on the Interfacial Reaction between Electroless-Plated UBM (Under Bump Metallurgy) on Cu pads and Pb-Sn-Ag Solder Bumps (Cu pad위에 무전해 도금된 UBM (Under Bump Metallurgy)과 Pb-Sn-Ag 솔더 범프 계면 반응에 관한 연구)

  • Na, Jae-Ung;Baek, Gyeong-Uk
    • Korean Journal of Materials Research
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    • v.10 no.12
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    • pp.853-863
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    • 2000
  • In this study, a new UBM materials system for solder flip chip interconnection of Cu pads were investigated using electroless copper (E-Cu) and electroless nickel (E-Ni) plating method. The interfacial reaction between several UBM structures and Sn-36Pb-2Ag solder and its effect on solder bump joint mechanical reliability were investigated to optimife the UBM materials design for solder bump on Cu pads. Fer the E-Cu UBM, continuous coarse scallop-like $Cu_{6}$ $Sn_{5}$ , intermetallic compound (IMC) was formed at the solder/E-Cu interface, and bump fracture occurred this interface under relative small load. In contrast, Fer the E-Ni/E-Cu UBM, it was observed that E-Ni effectively limited the growth of IMC at the interface, and the Polygonal $Ni_3$$Sn_4$ IMC was formed because of crystallographic mismatch between monoclinic $Ni_3$$Sn_4$ and amorphous E-Ni phase. Consequently, relatively higher bump adhesion strength was observed at E-Ni/E-Cu UBM than E-Cu UBM. As a result, it was fecund that E-Ni/E-Cu UBM material system was a better choice for solder flip chip interconnection on CU PadS.

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Flip Chip Process by Using the Cu-Sn-Cu Sandwich Joint Structure of the Cu Pillar Bumps (Cu pillar 범프의 Cu-Sn-Cu 샌드위치 접속구조를 이용한 플립칩 공정)

  • Choi, Jung-Yeol;Oh, Tae-Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.4
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    • pp.9-15
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    • 2009
  • Compared to the flip-chip process using solder bumps, Cu pillar bump technology can accomplish much finer pitch without compromising stand-off height. Flip-chip process with Cu pillar bumps can also be utilized in radio-frequency packages where large gap between a chip and a substrate as well as fine pitch interconnection is required. In this study, Cu pillars with and without Sn caps were electrodeposited and flip-chip-bonded together to form the Cu-Sn-Cu sandwiched joints. Contact resistances and die shear forces of the Cu-Sn-Cu sandwiched joints were evaluated with variation of the height of the Sn cap electrodeposited on the Cu pillar bump. The Cu-Sn-Cu sandwiched joints, formed with Cu pillar bumps of $25-{\mu}m$ diameter and $20-{\mu}m$ height, exhibited the gap distance of $44{\mu}m$ between the chip and the substrate and the average contact resistance of $14\;m{\Omega}$/bump without depending on the Sn cap height between 10 to $25\;{\mu}m$.

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Fabrication of Sn-Cu Bump using Electroless Plating Method (무전해 도금법을 이용한 Sn-Cu 범프 형성에 관한 연구)

  • Moon, Yun-Sung;Lee, Jae-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.2
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    • pp.17-21
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    • 2008
  • The electroless plating of copper and tin were investigated for the fabrication of Sn-Cu bump. Copper and tin were electroless plated in series on $20{\mu}m$ diameter copper via to form approximately $10{\mu}m$ height bump. In electroless copper plating, acid cleaning and stabilizer addition promoted the selectivity of bath on the copper via. In electroless tin plating, the coating thickness of tin was less uniform relative to that of electroless copper, however the size of Sn-Cu bump were uniform after reflow process.

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Study on the Characteristics of Electroplated Solder: Comparison of Sn-Cu and Sn-Pb Bumps (무연 도금 솔더의 특성 연구: Sn-Cu 및 Sn-Pb 범프의 비교)

  • 정석원;정재필
    • Journal of the Korean institute of surface engineering
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    • v.36 no.5
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    • pp.386-392
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    • 2003
  • The electroplating process for a solder bump which can be applied for a flip chip was studied. Si-wafer was used for an experimental substrate, and the substrate were coated with UBM (Under Bump Metallization) of Al(400 nm)/Cu(300 nm)Ni(400 nm)/Au(20 nm) subsequently. The compositions of the bump were Sn-Cu and eutectic Sn-Pb, and characteristics of two bumps were compared. Experimental results showed that the electroplated thickness of the solders were increased with time, and the increasing rates were TEX>$0.45 <\mu\textrm{m}$/min for the Sn-Cu and $ 0.35\mu\textrm{m}$/min for the Sn-Pb. In the case of Sn-Cu, electroplating rate increased from 0.25 to $2.7\mu\textrm{m}$/min with increasing current density from 1 to 8.5 $A/dm^2$. In the case of Sn-Pb the rate increased until the current density became $4 A/dm^2$, and after that current density the rate maintains constant value of $0.62\mu\textrm{m}$/min. The electro plated bumps were air reflowed to form spherical bumps, and their bonded shear strengths were evaluated. The shear strength reached at the reflow time of 10 sec, and the strength was of 113 gf for Sn-Cu and 120 gf for Sn-Pb.

Intermetallic Compound Growth Characteristics of Cu/thin Sn/Cu Bump for 3-D Stacked IC Package (3차원 적층 패키지를 위한 Cu/thin Sn/Cu 범프구조의 금속간화합물 성장거동분석)

  • Jeong, Myeong-Hyeok;Kim, Jae-Won;Kwak, Byung-Hyun;Kim, Byoung-Joon;Lee, Kiwook;Kim, Jaedong;Joo, Young-Chang;Park, Young-Bae
    • Korean Journal of Metals and Materials
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    • v.49 no.2
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    • pp.180-186
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    • 2011
  • Isothermal annealing and electromigration tests were performed at $125^{\circ}C$ and $125^{\circ}C$, $3.6{\times}10_4A/cm^2$ conditions, respectively, in order to compare the growth kinetics of the intermetallic compound (IMC) in the Cu/thin Sn/Cu bump. $Cu_6Sn_5$ and $Cu_3Sn$ formed at the Cu/thin Sn/Cu interfaces where most of the Sn phase transformed into the $Cu_6Sn_5$ phase. Only a few regions of Sn were not consumed and trapped between the transformed regions. The limited supply of Sn atoms and the continued proliferation of Cu atoms enhanced the formation of the $Cu_3Sn$ phase at the Cu pillar/$Cu_6Sn_5$ interface. The IMC thickness increased linearly with the square root of annealing time, and increased linearly with the current stressing time, which means that the current stressing accelerated the interfacial reaction. Abrupt changes in the IMC growth velocities at a specific testing time were closely related to the phase transition from $Cu_6Sn_5$ to $Cu_3Sn$ phases after complete consumption of the remaining Sn phase due to the limited amount of the Sn phase in the Cu/thin Sn/Cu bump, which implies that the relative thickness ratios of Cu and Sn significantly affect Cu-Sn IMC growth kinetics.

Intermetallic Compound Growth Characteristics of Cu/Ni/Au/Sn-Ag/Cu Micro-bump for 3-D IC Packages (3차원 적층 패키지를 위한 Cu/Ni/Au/Sn-Ag/Cu 미세 범프 구조의 열처리에 따른 금속간 화합물 성장 거동 분석)

  • Kim, Jun-Beom;Kim, Sung-Hyuk;Park, Young-Bae
    • Journal of the Microelectronics and Packaging Society
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    • v.20 no.2
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    • pp.59-64
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    • 2013
  • In-situ annealing tests of Cu/Ni/Au/Sn-Ag/Cu micro-bump for 3D IC package were performed in an scanning electron microscope chamber at $135-170^{\circ}C$ in order to investigate the growth kinetics of intermetallic compound (IMC). The IMC growth behaviors of both $Cu_3Sn$ and $(Cu,Ni,Au)_6Sn_5$ follow linear relationship with the square root of the annealing time, which could be understood by the dominant diffusion mechanism. Two IMC phases with slightly different compositions, that is, $(Cu,Au^a)_6Sn_5$ and $(Cu,Au^b)_6Sn_5$ formed at Cu/solder interface after bonding and grew with increased annealing time. By the way, $Cu_3Sn$ and $(Cu,Au^b)_6Sn_5$ phases formed at the interfaces between $(Cu,Ni,Au)_6Sn_5$ and Ni/Sn, respectively, and both grew with increased annealing time. The activation energies for $Cu_3Sn$ and $(Cu,Ni,Au)_6Sn_5$ IMC growths during annealing were 0.69 and 0.84 eV, respectively, where Ni layer seems to serve as diffusion barrier for extensive Cu-Sn IMC formation which is expected to contribute to the improvement of electrical reliability of micro-bump.

Studies on the Interfacial Reaction between electroplated Eutectic Pb/Sn Flip-Chip Solder Bump and UBM(Under Bump Metallurgy) (전해 도금법을 이용한 공정 납-주석 플립 칩 솔더 범프와 UBM(Under Bump Metallurgy) 계면반응에 관한 연구)

  • Jang, Se-Yeong;Baek, Gyeong-Ok
    • Korean Journal of Materials Research
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    • v.9 no.3
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    • pp.288-294
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    • 1999
  • In the flip chip interconnection using solder bump, the Under Bump Metallurgy (UBM) is required to perform multiple functions in its conversion of an aluminum bond pad to a solderable surface. In this study, various UBM systems such as $Al 1\mu\textrm{m} / Ti 0.2\mu\textrm{m} / Cu 5\mu\textrm{m}, Al 1\mu\textrm{m} / Ti 0.2\mu\textrm{m} / Cu 1\mu\textrm{m}, al 1\mu\textrm{m}/Ni 0.2\mu\textrm{m} / Cu 1\mu\textrm{m} and Al 1\mu\textrm{m}/Pd 0.2\mu\textrm{m} / Cu 1\mu\textrm{m}$ for flip chip interconnection using the low melting point eutectic 63Sn-37Pb solder were investigated and compared to their metallurgical properties. $100\mu\textrm{m}$ size bumps were prepared for using an electroplating process. The effects of the number of reflows and aging time on the growth of intermetallic compounds(IMC) were investigated. $Cu_6Sn_5$ and $Cu_3Sn$ IMC were abserved after aging treatment in the UBM system with thick coper $(Al 1\mu\textrm{m}/Ti 0.2\mu\textrm{m}/Cu 5\mu\textrm{m})$. However only the $Cu_6Sn_5$ was detected in the UBM system with $1\mu\textrm{m}$ thick copper even after 2 reflow and 7 day aging at $150^{\circ}C$. Complete Cu consumption by Cu-Sn IMC growth gives rise to a direct contact between solder inner layer such as Ti, Ni and Pd, and hence to possibly cause reactions between two of them. In this study, however, only for the Pd case, IMC of PdSn. was observed by Cu consumption. UBM interfacial reactions with s이der affected the adhesion strength ot s이der balls after s이der reflow and annealing treatment.

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Aging Characteristic of Shear Strength in Micro Solder Bump (마이크로 솔더 범프의 전단강도와 시효 특성)

  • 김경섭;유정희;선용빈
    • Journal of Welding and Joining
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    • v.20 no.5
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    • pp.72-77
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    • 2002
  • Flip-chip interconnection that uses solder bump is an essential technology to improve the performance of microelectronics which require higher working speed, higher density, and smaller size. In this paper, the shear strength of Cr/Cr-Cu/Cu UBM structure of the high-melting solder b01p and that of low-melting solder bump after aging is evaluated. Observe intermetallic compound and bump joint condition at the interface between solder and UBM by SEM and TEM. And analyze the shear load concentrated to bump applying finite element analysis. As a result of experiment, the maximum shear strength of Sn-97wt%Pb which was treated 900 hrs aging has been decreased as 25% and Sn-37wt%Pb sample has been decreased as 20%. By the aging process, the growth of $Cu_6Sn_5$ and $Cu_3Sn$ is ascertained. And the tendency of crack path movement that is interior of a solder to intermetallic compound interface is found.

Fabrication and Characteristics of Electroplated Sn-0.7Cu Micro-bumps for Flip-Chip Packaging (플립칩 패키징용 Sn-0.7Cu 전해도금 초미세 솔더 범프의 제조와 특성)

  • Roh, Myong-Hoon;Lee, Hea-Yeol;Kim, Wonjoong;Jung, Jae Pil
    • Korean Journal of Metals and Materials
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    • v.49 no.5
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    • pp.411-418
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    • 2011
  • The current study investigates the electroplating characteristics of Sn-Cu eutectic micro-bumps electroplated on a Si chip for flip chip application. Under bump metallization (UBM) layers consisting of Cr, Cu, Ni and Au sequentially from bottom to top with the aim of achieving Sn-Cu bumps $10\times10\times6$ ${\mu}m$ in size, with 20${\mu}m$ pitch. In order to determine optimal plating parameters, the polarization curve, current density and plating time were analyzed. Experimental results showed the equilibrium potential from the Sn-Cu polarization curve is -0.465 V, which is attained when Sn-Cu electro-deposition occurred. The thickness of the electroplated bumps increased with rising current density and plating time up to 20 mA/$cm^2$ and 30 min respectively. The near eutectic composition of the Sn-0.72wt%Cu bump was obtained by plating at 10 mA/$cm^2$ for 20 min, and the bump size at these conditions was $10\times10\times6$ ${\mu}m$. The shear strength of the eutectic Sn-Cu bump was 9.0 gf when the shearing tip height was 50% of the bump height.

Effect of Thermal Aging on the Intermetallic compound Growth kinetics in the Cu pillar bump (Cu pillar 범프 내의 금속간화합물 성장거동에 미치는 시효처리의 영향)

  • Lim, Gi-Tae;Lee, Jang-Hee;Kim, Byoung-Joon;Lee, Ki-Wook;Lee, Min-Jae;Joo, Young-Chang;Park, Young-Bae
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.4
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    • pp.15-20
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    • 2007
  • Growth kinetics of intermetallic compound (IMC) at various interface in Cu pillar bump during aging have been studied by thermal aging at 120, 150 and $165^{\circ}C$ for 300h. In result, $Cu_6Sn_5\;and\;Cu_3Sn$ were observed in the Cu pillar/SnPb interface and IMC growth followed parabolic law with increasing aging temperatures and time. Also, growth kinetics of IMC layer was faster for higher aging temperature with time. Kirkendall void formed at interface between Cu pillar and $Cu_3Sn$ as well as within the $Cu_3Sn$ layer and propagated with increasing time. $(Cu,Ni)_6Sn_5$ formed at interface between SnPb and Ni(P) after reflow and thickness change of $(Cu,Ni)_6Sn_5$ didn't observe with aging time. The apparent activation energies for growth of total $(Cu_6Sn_5+Cu_3Sn),\;Cu_6Sn_5\;and\;Cu_3Sn$ intermetallics from measurement of the IMC thickness with thermal aging temperature and time were 1.53, 1.84 and 0.81 eV, respectively.

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