• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.4
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• pp.201-208
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• 2016

Non-volatile counter is a counter that maintains the value without external power supply. It has been used for the applications related to warranty issues to count and record certain events such as power cycles, operating time, hard resets, and timeouts. It has been conventionally implemented with volatile memory-based counter and battery backup or non-volatile memory such as EEPROM. Both of them have a lifetime issue due to the limited lifetime of the battery and the endurance of the non-volatile memory cells, which incurs significant redundancy in design. In this paper, we introduce a hybrid architecture of volatile (SRAM) and non-volatile memory (EEPROM) cells to achieve required lifetime of the non-volatile counter with smaller cost. We conduct a design space exploration of the proposed hybrid architecture with the parameters of various kinds of non-volatile memories. The analysis result shows that the proposed hybrid non-volatile counter can extend the lifetime up to 6 times compared to the battery-backup volatile memory-based implementation.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.6
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• pp.23-33
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• 1996

The exploitation of locality of reference in shared memory NUMA multiprocessors is one of the improtant problems in parallel processing today. In this paper, we propose a revised hardeare reference counter to help operating system to manage locality. In contrast to the previous one, the value of counter can abe adjusted dynamically and periodically to adapt the page replication policy to the various memory reference patterns of processors. We use execution-driven simulation of real applications to evaluate the effectiveness of our adjustable DELAY counter. Our main conclusijon is that by using the adjustable DELAY counter the t normalized average memory access costs and the variance of them become smaller for most applications than the previous one and more robust memory management policies can be provided for the operating systems.

• The Korean Journal of Archival Studies
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• no.29
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• pp.79-127
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• 2011

This study was designed for a theoretical and methodological discussion on a methodological medium, orality to historicize the 'Civilian Massacre', of countless counter-memories which are inherent in Korean society. In other words, prior to collection of oral sources, it is to produce reliable oral history through a discussion on oral history research methodology and qualitative research methodology of oral history, after theorizing occurrence process of dominant-memory and counter-memory, orality's meanings as a counter-memory and the necessity for historicization of neglected memories, focusing on a 'memory' which is a fundamental background of an 'oral' act. Based on this basic process, oral recording process was performed in Changsoo-myeon, Yeongdeok-gun, Kyung-book Province where was selected as a research target for the civilian massacre that is a case to figure out what kind of high-quality record is produced, with a precise understanding of a particular methodology, oral history.

• The Journal of the Korea Contents Association
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• v.9 no.2
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• pp.163-172
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• 2009

As cultural contents are rising to the surface, the contents and interests regarding the industries that utilize the culture become higher than any other times. Culture is performed with memory, and the culture that excludes memory cannot exist. The memory exceeds a dimension of the individual and operates with an assembled and social memory. Furthermore the culture requires media to put memories inevitable. Therefore, recent image texts are coming to the attention as new storage media. So this essay analyzed the meaning of 'memory' as social-cultural memory by putting the sixth generation Chinese movies to the center and restoration of image text that puts memory in it. And also, I examined the cultural meanings of 'individual memories' as the 'counter memory' and tried to find the possibility of junction between memory industry and the contents. I focused on the sixth generation Chinese movies because these movies made remarkable progresses in the international film festivals though they were made in 'underground' by objecting to 'official memory' proposed by the Chinese government.

• Journal of Korea Game Society
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• v.11 no.4
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• pp.127-142
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• 2011

This study examined if realistic cues of violence - blood color (red), sound cues (screams of pain), and perspective (first-person) - influence user arousal, feeling of presence, and their memory for the game events and positions with personal experience of games. The relationship between arousal and presence was also analyzed with their effects on memory in a 3D modified shooter game (CounterStrike). Results indicated that both realism cues of violence increased the player's arousal regardless of the user's level of game experience, and the arousal had a significant relationship with engagement by affecting presence strongly. Especially, engagement (a sub-factor of presence) was stronger than other variables in explaining the memory effect, and it mediated the effect between arousal and memory. However, the first-person perspective did not show any significant effect on arousal, and had a negative effect on engagement.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.1
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• pp.11-20
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• 2008

The structure of 2-bit/cell flash memory device was characterized for sub-50 nm non-volatile memory (NVM) technology. The memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region, and is erased (or programmed) by using band-to-band tunneling hot-hole injection (or channel hot-electron injection). It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the $V_{th}$ margin for 2-bit/cell operation by ${\sim}2.5$ times. By controlling doping profiles of the channel doping and the counter channel doping in the recessed channel region, we could obtain the $V_{th}$ margin more than ${\sim}1.5V$. For a bit-programmed cell, reasonable bit-erasing characteristics were shown with the bias and stress pulse time condition for 2-bit/cell operation. The length effect of the spacer-type storage node is also characterized. Device which has the charge storage length of 40 nm shown better ${\Delta}V_{th}$ and $V_{th}$ margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100 nm. It was shown that peak of trapped charge density was observed near ${\sim}10nm$ below the source/drain junction.

• Journal of the Semiconductor & Display Technology
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• v.23 no.3
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• pp.52-57
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• 2024

Persistent memory technology has been recognized as a next-generation memory solution because of its stability over traditional volatile memory. The primary advantage of persistent memory is its non-volatile nature, allowing data retention even when the power is off. Additionally, persistent memory offers faster read speeds compared to traditional HDDs and SSDs. However, ensuring data consistency through cache flushing commands is increasingly important so that performance and power consumption issue would be challenges. This paper proposes a new cache structure to mitigate the drawbacks of cache flushing by considering the number of flushes per cache line. On top of that, a counter and decision bit to track and manage these actions are added. As a result, this architecture decreases approximately 56% of the additional memory access.

• SUVANNABHUMI
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• v.16 no.2
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• pp.185-211
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• 2024

Southeast Asian cities like Manila, the Philippines, and Singapore have witnessed economic, political, and cultural changes over the years, especially after periods of colonization. States control their urban fabric-that is, its organization, planning, and design of cities-and thus dictate the flow of capital and forces of labor. Urban poor settlements, an offshoot of capital accumulation, are (re)moved around these cities in accordance with governing visions of development. For populations that are forced into changes brought about by urban development, practices of remembering are also controlled by dominant powers. These "monuments" are established in/as spaces to oblige an image of membership into a society ruled by such powers. Nevertheless, alternate sites of remembering counter these monumental spaces. This paper takes an interest in two novels that feature such places. Liwayway Arceo's Canal de la Reina (1972) and Suchen Christine Lim's The River's Song (2013) both figure rivers in Manila and Singapore, respectively. The eponymous river is the central axis of Canal de la Reina, entangled in class conflict and swift urban change in post-Commonwealth Manila. In The River's Song, the famous Singapore River provides a refuge for reminiscing about Singapore before the city-state's independence. Comparing these novels to what Filipino comparatist Ruth Jordana Pison calls fictional "counter-memory," we argue that their rivers remember personal and embodied experiences eliminated from hegemonic accounts of the city. Thus, they function as what we call "counter-monuments" for the urban poor marginalized in the history of the Philippines and Singapore.

• ETRI Journal
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• v.37 no.6
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• pp.1087-1095
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• 2015

Mobility management is important in mobile cellular networks. In this study, we considered an enhanced location-based registration (ELR) method. In the ELR method, even when a mobile phone enters a cell to find that the cell is already on its list (of visited cells) and then updates its main counter, it does not remove any cells from the list (memory space permitting), which gives better performance than the location-based registration (LR) method. However, the location registration cost of the ELR method is still high, and there is a lot of room for improvement with regards to this matter. We now propose an improved version of the ELR method; namely, the improved ELR (iELR). In the iELR method, when a mobile phone enters a cell to find that the cell counter value is less than the main counter value, or when a mobile phone enters a cell to register its location, it updates the main counter and the cell counter values as much as possible to reduce the future need for registrations. We show that our proposed iELR method provides better performance than the ELR method.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.4
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• pp.388-396
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• 2012

In this paper, a $320{\times}240$ pixel, 80 frame/s CMOS image sensor with a low power dual correlated double sampling (CDS) scheme is presented. A novel 8-bit hold-and-go counter in each column is proposed to obtain 10-bit resolution. Furthermore, dual CDS and a configurable counter scheme are also discussed to realize efficient power reduction. With these techniques, the digital counter consumes at least 43% and at most 61% less power compared with the column-counters type, and the frame rate is approximately 40% faster than the double memory type due to a partial pipeline structure without additional memories. The prototype sensor was fabricated in a Samsung $0.13{\mu}m$ 1P4M CMOS process and used a 4T APS with a pixel pitch of $2.25{\mu}m$. The measured column fixed pattern noise (FPN) is 0.10 LSB.