• Journal of the Korean institute of surface engineering
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• v.56 no.1
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• pp.62-68
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• 2023

Silicon (Si) is considered as a promising substitute for the conventional graphite due to its high theoretical specific capacity (3579 mAh/g, Li₁₅Si₄) and proper working voltage (~0.3V vs Li⁺/Li). However, the large volume change of Si during (de)lithiation brings about severe degradation of battery performances, rendering it difficult to be applied in the practical battery directly. As a one feasible candidate of industrial Si anode, silicon monoxide (SiO_x) demonstrates great electrochemical stability with its specialized strategy, downsized Si nanocrystallites surrounded by Li⁺ inactive buffer phase (Li₂O and Li₄SiO₄). Nevertheless, SiO_x inherently has the initial irreversible capacity and poor electrical conductivity. To overcome those issues, conformal carbon coating has been performed on SiO_x utilizing ethylbenzene as the carbon precursor of chemical vapor deposition (CVD). Through various characterizations, it is confirmed that the carbon is homogeneously coated on the surface of SiO_x. Accordingly, the carbon-coated SiOx from CVD using ethylbenzene demonstrates 73% of the first cycle efficiency and great cycle life (88.1% capacity retention at 50th cycle). This work provides a promising synthetic route of the uniform and scalable carbon coating on Si anode for high-energy density.

• Journal of the Korean Society of Visualization
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• v.5 no.1
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• pp.3-8
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• 2007

We present simple methods for fabricating high aspect-ratio polymer nanostructures on a solid substrate by rigiflex lithography with tailored capillarity and adhesive force. In the first method, a thin, thermoplastic polymer film was prepared by spin coating on a substrate and the temperature was raised above the polymer's glass transition temperature ($T_g$) while in conformal contact with a poly(urethane acrylate) (PUA) mold having nano-cavities. Consequently, capillarity forces the polymer film to rise into the void space of the mold, resulting in nanostructures with an aspect ratio of ${\sim}4$. In the second method, very high aspect-ratio (>20) nanohairs were fabricated by elongating the pre-formed nanostructures upon removal of the mold with the aid of tailored capillarity and adhesive force at the mold/polymer interface. Finally, these two methods were further used to fabricate micro/nano hierarchical structures by sequential application of the molding process for mimicking nature's functional surfaces such as a lotus leaf and gecko foot hairs.

• Journal of the Korean Society for Precision Engineering
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• v.20 no.5
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• pp.218-224
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• 2003

This paper describes a novel MEMS integration technique on a CMOS chip. MEMS integration on CMOS circuit has many advantages in view of manufacturing cost and reliability. The surface topography of a CMOS chip from a commercial foundry has 0.9 ${\mu}{\textrm}{m}$ bumps due to the conformal coating on aluminum interconnect patterns, which are used for addressing each MEMS element individually. Therefore, it is necessary to achieve a flat mirror-like CMOS chip fer the microelectromechanical system (MEMS) such as micro mirror array. Such CMOS chip needs an additional thickness of the dielectric passivation layer to ease the subsequent planarization process. To overcome a temperature limit from the aluminum thermal degradation, this study uses RF sputtering of silicon nitride at low temperature and then polishes the CMOS chip together with the surrounding dummy pieces to define a polishing plane. Planarization reduces 0.9 ${\mu}{\textrm}{m}$ of the bumps to less than 25 nm.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.47-50
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• 2002

ZnO nanowires were coated conformally with aluminum oxide ($Al_{2}O_{3}$) material by atomic layer deposition (ALD). The ZnO nanowires were first synthesized on a Si (100) substrate at $1380^{\circ}C$ from ball-milled ZnO powders by a thermal evaporation procedure with an argon carrier gas without any catalysts; the length and diameter of these ZnO nanowires are $20\sim30{\mu}m$ and $50{\sim}200$ nm, respectively. $Al_{2}O_{3}$ films were then deposited on these ZnO nanowires by ALD at a substrate temperature of $300^{\circ}C$ using trimethylaluminum (TMA) and distilled water ($H_{2}O$). Transmission electron microscopy (TEM) images of the deposited ZnO nanowires revealed that 40nm-thick $Al_{2}O_{3}$ cylindrical shells surround the ZnO nanowires.

• Journal of Powder Materials
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• v.31 no.3
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• pp.255-262
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• 2024

Nano-oxide dispersion-strengthened (ODS) superalloys have attracted attention because of their outstanding mechanical reinforcement mechanism. Dispersed oxides increase the material's strength by preventing grain growth and recrystallization, as well as increasing creep resistance. In this research, atomic layer deposition (ALD) was applied to synthesize an ODS alloy. It is useful to coat conformal thin films even on complex matrix shapes, such as nanorods or powders. We coated an Nb-Si-based superalloy with TiO₂ thin film by using rotary-reactor type thermal ALD. TiO₂ was grown by controlling the deposition recipe, reactor temperature, N₂ flow rate, and rotor speed. We could confirm the formation of uniform TiO₂ film on the surface of the superalloy. This process was successfully applied to the synthesis of an ODS alloy, which could be a new field of ALD applications.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.211-211
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• 1999

Titanium nitride (TiN) thin films have useful properties including high hardness, good electrical conductivity, high melting point, and chemical inertness. The applications have included wear-resistant hard coatings on machine tools and bearings, decorative coating making use of the golden color, thermal control coatings for widows, and erosion resistant coatings for spacecraft plasma probes. For all these applications as feature sizes shrink and aspect ratios grow, the issue of good step coverage becomes increasingly important. It is therefore essential to manufacture conformal coatings of TiN. The growth of TiN thin films by chemical vapor deposition (CVD) is of great interest for achieving conformal deposition. The most widely used precursor for TiN is TiCl4 and NH3. However, chlorine impurity in the as-grown films and relatively high deposition temperature (>$600^{\circ}C$) are considered major drawbacks from actual device fabrication. To overcome these problems, recently, MOCVD processes including plasma assisted have been suggested. In this study, therefore, we have doposited Ti(C, N) thin films on Si(100) and D2 steel substrates in the temperature range of 150-30$0^{\circ}C$ using tetrakis diethylamido titanium (TDEAT) and titanium isopropoxide (TIP) by pulsed DC plamsa enhanced metal-organic chemical vapor deposition (PEMOCVD) method. Polycrystalline Ti(C, N) thin films were successfully grown on either D2 steel or Si(100) surfaces at temperature as low as 15$0^{\circ}C$. Compositions of the as-grown films were determined with XPS and RBS. From XPS analysis, thin films of Ti(C, N) with low oxygen concentration were obtained. RBS data were also confirmed the changes of stoichiometry and microhardness of our films. Radical formation and ionization behaviors in plasma are analyzed by optical emission spectroscopy (OES) at various pulsed bias and gases conditions. H2 and He+H2 gases are used as carrier gases to compare plasma parameter and the effect of N2 and NH3 gases as reactive gas is also evaluated in reduction of C content of the films. In this study, we fond that He and H2 mixture gas is very effective in enhancing ionization of radicals, especially N resulting is high hardness. The higher hardness of film is obtained to be ca. 1700 HK 0.01 but it depends on gas species and bias voltage. The proper process is evident for H and N2 gas atmosphere and bias voltage of 600V. However, NH3 gas highly reduces formation of CN radical, thereby decreasing C content of Ti(C, N) thin films in a great deal. Compared to PVD TiN films, the Ti(C, N) film grown by PEMOCVD has very good conformability; the step coverage exceeds 85% with an aspect ratio of more than 3.

• Applied Chemistry for Engineering
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• v.29 no.1
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• pp.18-21
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• 2018

We report on the simple preparation method of large-scale structured catalysts by temperature-regulated chemical vapor deposition with a high cell-density ceramic honeycomb monolith. And the feasibility for dry reforming of methane catalysts was evaluated. The NiO/Cordierite (CDR) catalyst was prepared by controlling coating conditions at each temperature step, leading to a conformal deposition of NiO inside the cordierite honeycomb monolith with the cell density of 600 cpsi. The catalytic conversion of $CH_4$ and $CO_2$ for dry reforming of methane were about 83% and 90% with gas hourly space velocity of $10,000h^{-1}$ at $800^{\circ}C$, respectively. As a result, it exhibited that the temperature-regulated chemical vapor deposition method can be expedient for the preparation of large-scale structured catalysts.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.4
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• pp.31-34
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• 2016

System In Package (SiP) is getting popular and momentum for the recent wearable, IoT and connectivity application apart from mobile phone. This is driven by market demands of cost competitive, lighter and smaller/thinner and higher performance. As one of many semiconducting assembly products, Leadframe product has been widely used for low cost solution, light/ small and thin form factor. But It has not been applied for SiP although Leadframe product has many advantages in cost, size and reliability performance. SiP is mostly based on laminate substrate and technically difficult on Leadframe substrate because of a limitation in SMT performance. In this paper, Leadframe based SiP product has been evaluated about key technical challenges in SMT performance and electrical shield technology. Mostly Leadframe is considered not available to apply EMI shield because of tie-bar around package edge. In order to overcome two major challenges, connection bars were deployed properly for SMT pad to pad and additional back-side etching was implemented after molding process to achieve electrical isolation from outer shield coating. This product was confirmed assembly workability as well as reliability.

• Applied Chemistry for Engineering
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• v.30 no.6
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• pp.737-741
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• 2019

A low-cost and flexible potassium ion (K⁺) sensor was fabricated through a screen-printed process. Uniform and conformal coating of conductive inks was verified by scanning electron microscopy and optical microscopy measurements. The K⁺-sensors showed a high sensitivity, fast response time, and low detection limit. The sensitivity of K⁺-sensor was similar to that of both mechanically normal and bent states. The K⁺-sensor exhibited a good reproducibility with no hysteresis effect and excellent long term stability. In addition, the K⁺-sensor showed an excellent selectivity for K⁺ concentrations in the presence of other interfering cation ions. Successful measurements of K⁺ concentrations in sports drink samples were demonstrated by comparing K⁺ concentration values from K⁺-sensor to those of using a commercial K⁺-meter.

• Korean Journal of Materials Research
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• v.33 no.11
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• pp.491-496
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• 2023

As the demand for p-type semiconductors increases, much effort is being put into developing new p-type materials. This demand has led to the development of novel new p-type semiconductors that go beyond existing p-type semiconductors. Copper iodide (CuI) has recently received much attention due to its wide band gap, excellent optical and electrical properties, and low temperature synthesis. However, there are limits to its use as a semiconductor material for thin film transistor devices due to the uncontrolled generation of copper vacancies and excessive hole doping. In this work, p-type CuI semiconductors were fabricated using the chemical vapor deposition (CVD) process for thin-film transistor (TFT) applications. The vacuum process has advantages over conventional solution processes, including conformal coating, large area uniformity, easy thickness control and so on. CuI thin films were fabricated at various deposition temperatures from 150 to 250 ℃ The surface roughness root mean square (RMS) value, which is related to carrier transport, decreases with increasing deposition temperature. Hall effect measurements showed that all fabricated CuI films had p-type behavior and that the Hall mobility decreased with increasing deposition temperature. The CuI TFTs showed no clear on/off because of the high concentration of carriers. By adopting a Zn capping layer, carrier concentrations decreased, leading to clear on and off behavior. Finally, stability tests of the PBS and NBS showed a threshold voltage shift within ±1 V.