• 약학회지
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• 제31권3호
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• pp.133-139
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• 1987

These studies were attempted to investigate the preventive effect of Ganoderma lucidum extract administered concurrently with glutathione on the liver damage induced by carbon tetrachloride ($CCl_4$) in rats. S-GOT and S-GPT activities of all the pre-treatment groups were significantly decreased, as compared with those of the control intoxicated by $CCl_4$. The concurrent administrations of Ganoderma lucidum extract with glutathione (100+100mg/kg, 200+100mg/kg, and 400+100mg/kg, respectively) were more effective than the individual administrations. i.e., Ganaderma lucidtcm extract (100, 200 and 400mg/kg, respectively) and glutathione (100, 200 and 400mg/kg, respectively). On the determination of lipid-peroxidation in liver, the concurrent administrations of Ganoderma lucidum extract with glutathione (100+100mg/kg, and 200+100mg/kg, respectively) significantly reduced the liver TBA values. Although hepatic cellular necrosis and fatty acid deposit were remarkably increased by $CCl_4$ intoxication, the concurrent administration of Ganoderma lucidum extract with glutathione (200+100mg/kg) reduced the pathological changes of parenchymal cell necrosis and fatty changes around centrilobalar area of the control. These findings indicate that the concurrent administrations of Ganoderma lucidum extract with glutathione showed better improvements than the individual administrations of them in all pathological aspects, in particular, against hepatitis and hepatic necrosis due to the cellular necrosis and fatty infiltration.

• 한국CDE학회논문집
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• 제3권4호
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• pp.283-292
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• 1998

The engineering process including design, analysis/evaluation and manufacturing activities is becoming one of the key issues to embody a concurrent engineering concept. This paper proposes a framework to integrated the complicated engineering design and manufacturing processes under the concurrent engineering environment. The framework offers the following facilities: (1) to represent the complicated engineering process (2) to coordinate design activities and execute the process in a distributed environment (3) to support a communication among the related engineers. The engineering processes is depicted using process flow graphs that consist in tasks and the corresponding input and output data. The engineering activities in the defined processes can be executed in a distributed environment through process controller of the framework. Engineers can communicate to suggest their opinions and to exchange product information in the framework. We have conformed the CORBA standard to integrate various distributed engineering the and communicate among them, and used a Java to support the platform independent environment on the Internet. Since the proposed framework an be a formal approach to integrate the engineering processes by providing formalism, parallelism, reusability, and flexibility, it can be effectively applied to embody the concurrent engineering concept in a distributed environment.

• Structural Engineering and Mechanics
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• 제76권4호
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• pp.529-540
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• 2020

Concurrent topology optimization of macrostructure and microstructure has attracted significant interest due to its high structural performance. However, most of the existing works are carried out under deterministic conditions, the obtained design may be vulnerable or even cause catastrophic failure when the load position exists uncertainty. Therefore, it is necessary to take load position uncertainty into consideration in structural design. This paper presents a computational method for robust concurrent topology optimization with consideration of load position uncertainty. The weighted sum of the mean and standard deviation of the structural compliance is defined as the objective function with constraints are imposed to both macro- and micro-scale structure volume fractions. The Bivariate Dimension Reduction method and Gauss-type quadrature (BDRGQ) are used to quantify and propagate load uncertainty to calculate the objective function. The effective properties of microstructure are evaluated by the numerical homogenization method. To release the computation burden, the decoupled sensitivity analysis method is proposed for microscale design variables. The bi-directional evolutionary structural optimization (BESO) method is used to obtain the black-and-white designs. Several 2D and 3D examples are presented to validate the effectiveness of the proposed robust concurrent topology optimization method.

• Structural Engineering and Mechanics
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• 제81권3호
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• pp.267-280
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• 2022

Multiscale structure has attracted significant interest due to its high stiffness/strength to weight ratios and multifunctional performance. However, most of the existing concurrent topology optimization works are carried out under deterministic load conditions. Hence, this paper proposes a robust concurrent topology optimization method based on the bidirectional evolutionary structural optimization (BESO) method for the design of structures composed of periodic microstructures subjected to uncertain dynamic loads. The robust objective function is defined as the weighted sum of the mean and standard deviation of the module of dynamic structural compliance with constraints are imposed to both macro- and microscale structure volume fractions. The polynomial chaos expansion (PCE) method is used to quantify and propagate load uncertainty to evaluate the objective function. The effective properties of microstructure is evaluated by the numerical homogenization method. To release the computation burden, the decoupled sensitivity analysis method is proposed for microscale design variables. The proposed method is a non-intrusive method, and it can be conveniently extended to many topology optimization problems with other distributions. Several numerical examples are used to validate the effectiveness of the proposed robust concurrent topology optimization method.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.719-722
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• 1998

Fault simulation for large and complex sequential circuits is highly cpu-intensive task in the intergrated circuit design process. In this paper, we propose CM-SIM, a concurrent fault simulator which employs an optimal memory management strategy and simple list operations. CM-SIM removes inefficiencies and uses new dynamic memory management strategies, using contiguous array memory. Consequently, we got improved performance and reduced memory usage in concurrent fault simulation.

• 품질경영학회지
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• 제32권3호
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• pp.141-152
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• 2004

This study describes process and method to establish concurrent and/or sequential schedule planning for the system design process of the EIA632 standard. For this purpose, the study suggest Process and method that are context analysis of standard process, interface definition from activity decomposition, integration of related activities, and definition of concurrent and/or sequential work flow. The proposed process and method will contribute to minimize time loss that is emerged from activities iteration.

• 한국군사과학기술학회지
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• 제2권1호
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• pp.19-29
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• 1999

This paper treats the implementation of concurrent engineering principles for ROC development of a future infantry fighting vehicle. Based on the acquisition process of weapon systems and operational requirements provided by users, Quality Function Deployment(QFD) is used to translate the requirements of the user into specific trade-off analysis. Results of these studies and the use of concurrent engineering principles are presented.

• 대한전자공학회논문지
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• 제26권11호
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• pp.1804-1812
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• 1989

Recently, as the configuration of computer systems are changed to the system equipped with several processors, operating system to support these systems has been needed. The purpose of this paper is to implement concurrent execution of processes as synchronization mechanism by using concurrent programming language, pascal-s. In this paper, concurrnecy of processes is represented

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.883-886
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• 1998

We introduce a high level synthesis methodlogoy for automatic synthesis of asynchronous circuits form a language based on CSP. The input language is a high level concurrent algorithmic specification that can model complex concurrent control flow, logical and arithmetic computation and communications between them. This specification is translated into petri net which has actions. These actions are refined to synthesize the controllers and to allocate the data resources. We use the automatic synthesis through signal transition graphs (STGs) that allows to take advantage of logic synthsis methods to optimize the circuit.

• 전자공학회논문지B
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• 제30B권2호
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• pp.1-7
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• 1993

In this paper, we show that Petri nets can be applied to design and reliability analysis of concurrent, parallel and embedded mode system such as a lift system that is familiar to our daily life. Modeling the behavioral characteristics of the lift system we extend the standard Petri nets by nadditionally constant timed transition, fault transition, stochastic imed ttransition and conditional transition concepts. Likewise, we present esults of rdesign and analysis of the system. This method can be applied to esign and danalysis of any other concurrent systems.