• Title/Summary/Keyword: Complex Matrix Multiplication

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Signal Processing Logic Implementation for Compressive Sensing Digital Receiver (압축센싱 디지털 수신기 신호처리 로직 구현)

  • Ahn, Woohyun;Song, Janghoon;Kang, Jongjin;Jung, Woong
    • Journal of the Korea Institute of Military Science and Technology
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    • v.21 no.4
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    • pp.437-446
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    • 2018
  • This paper describes the real-time logic implementation of orthogonal matching pursuit(OMP) algorithm for compressive sensing digital receiver. OMP contains various complex-valued linear algebra operations, such as matrix multiplication and matrix inversion, in an iterative manner. Xilinx Vivado high-level synthesis(HLS) is introduced to design the digital logic more efficiently. The real-time signal processing is realized by applying dataflow architecture allowing functions and loops to execute concurrently. Compared with the prior works, the proposed design requires 2.5 times more DSP resources, but 10 times less signal reconstruction time of $1.024{\mu}s$ with a vector of length 48 with 2 non-zero elements.

Design of Low Complexity and High Throughput Encoder for Structured LDPC Codes (구조적 LDPC 부호의 저복잡도 및 고속 부호화기 설계)

  • Jung, Yong-Min;Jung, Yun-Ho;Kim, Jae-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.10
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    • pp.61-69
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    • 2009
  • This paper presents the design results of a low complexity and high throughput LDPC encoder structure. In order to solve the high complexity problem of the LDPC encoder, a simplified matrix-vector multiplier is proposed instead of the conventional complex matrix-vector multiplier. The proposed encoder also adopts a partially parallel structure and performs column-wise operations in matrix-vector multiplication to achieve high throughput. Implementation results show that the proposed architecture reduces the number of logic gates and memory elements by 37.4% and 56.7%, compared with existing five-stage pipelined architecture. The proposed encoder also supports 800Mbps throughput at 40MHz clock frequency which is improved about three times more than the existing architecture.

Efficient design of LDPC code Using circulant matrix and eIRA code (순환 행렬과 eIRA 부호를 이용한 효율적인 LDPC 부호화기 설계)

  • Bae Seul-Ki;Kim Joon-Sung;Song Hong-Yeop
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.2C
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    • pp.123-129
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    • 2006
  • In this paper, we concentrate on reducing the complexity for efficient encoder. We design structural LDPC code using circulant matrix and permutation matrix and eIRA code. It is possible to design low complex encoder by using shift register and differential encoder and interleaver than general LDPC encoder that use matrix multiplication operation. The code designed by this structure shows similar performance as random code. And the proposed codes can considerably reduce a number of XOR gates.

A Hybrid Method for Vibration Analysis of Rotor Systems (회전축계의 진동해석을 위한 Hybrid법에 관한 연구)

  • 양보석;최원호
    • Journal of KSNVE
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    • v.2 no.4
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    • pp.265-272
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    • 1992
  • The simplest method which has been used extensively for vibration analysis is the transfer matrix method introduced by Myklestad and was later extended by many researchers. The crude approximation results in considerable error on the predicted natural frequencies and to increase the accuracy the number of elements used in the analysis must be increased. In addition, numerical instability can occur as a result of matrix multiplication. Also the main disadvantage of the finite element method is the large computer memory requirements for complex systems. The new method proposed in this paper combines the transfer matrix and finite dynamic element techniques to form a powerful algorithm for vibration analysis of rotor system. It is shown that the accuracy improves significantly when the transfer matrix for each segment is obtained from finite dynamic element techniques.

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Blind Channel Estimation based on Hadamard Matrix Interstream Transmission for Multi-Cell MIMO Networks (다중 셀 MIMO 네트워크를 위한 Hadamard 행렬 Interstream 전송 기반 Blind 채널 추정)

  • Yang, Jae-Seung;Hanif, Mohammad Abu;Park, Ju-Yong;Lee, Moon-Ho
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.15 no.4
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    • pp.119-125
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    • 2015
  • In this paper, we introduce a Hadamard matrix interstream transmission based blind channel estimation for multi-cells multiple-input and multiple-output (MIMO) networks. The proposed scheme is based on a network with mobile stations (MS) which are deployed with multi cells. We assume that the MS have the signals from both cells. The signal from near cell are considered as desired signal and the signals from the other cells are interference signal. Since the channel is blind, so that we transmit Hadamard matrix pattern pilot stream to estimate the channel; that gives easier and fast channel estimation for large scale MIMO channel. The computation of Hadamard based system takes only complex additions, and thus the complexity of which is much lower than the scheme with Fourier transform since complex multiplications are not needed. The numerical analysis will give perfection of proposed channel estimation.

Fabrication and Mechanical Properties of Nanoquasicrystalline Phase Reinforced Ti-based Bulk Metallic Glass Matrix Composites (나노 준결정상으로 강화된 Ti계 벌크 비정질기지 복합재의 제조 및 기계적 특성 고찰)

  • Park, Jin-Man;Lim, Ka-Ram;Kim, Tae-Eung;Sohn, Sung-Woo;Kim, Do-Hyang
    • Journal of Korea Foundry Society
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    • v.28 no.6
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    • pp.261-267
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    • 2008
  • In-situ quasicrystalline icosahedral (I) phase reinforced Ti-based bulk metallic glass (BMG) matrix composites have been successfully fabricated by using two distinct thermal histories for BMG forming alloy. The BMG composite containing micron-scale Iphase has been introduced by controlling cooling rate during solidification, whereas nano-scale I-phase reinforced BMG composite has been produced by partial crystallization of BMG. For mechanical properties, micron-scale I-phase distributed BMG composite exhibited lower strength and plasticity compared to the monolithic BMG. On the other hand, nano-scale icosahedral phase embedded BMG composite showed enhanced strength and plasticity. These improved mechanical properties were attributed to the multiplication of shear bands and blocking of the shear band propagation in terms of isolation and homogeneous distribution of nanosize icosahdral phases in the glassy matrix, followed by stabilizing the mechanical and deformation instabilities.

Pole Placement Method of a Double Poles Using LQ Control and Pole's Moving-Range (LQ 제어와 근의 이동범위를 이용한 중근의 극배치 방법)

  • Park, Minho
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.21 no.1
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    • pp.20-27
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    • 2020
  • In general, a nonlinear system is linearized in the form of a multiplication of the 1st and 2nd order system. This paper reports a design method of a weighting matrix and control law of LQ control to move the double poles that have a Jordan block to a pair of complex conjugate poles. This method has the advantages of pole placement and the guarantee of stability, but this method cannot position the poles correctly, and the matrix is chosen using a trial and error method. Therefore, a relation function (𝜌, 𝜃) between the poles and the matrix was derived under the condition that the poles are the roots of the characteristic equation of the Hamiltonian system. In addition, the Pole's Moving-range was obtained under the condition that the state weighting matrix becomes a positive semi-definite matrix. This paper presents examples of how the matrix and control law is calculated.

An Efficient Computation of Matrix Triple Products (삼중 행렬 곱셈의 효율적 연산)

  • Im, Eun-Jin
    • Journal of the Korea Society of Computer and Information
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    • v.11 no.3
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    • pp.141-149
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    • 2006
  • In this paper, we introduce an improved algorithm for computing matrix triple product that commonly arises in primal-dual optimization method. In computing $P=AHA^{t}$, we devise a single pass algorithm that exploits the block diagonal structure of the matrix H. This one-phase scheme requires fewer floating point operations and roughly half the memory of the generic two-phase algorithm, where the product is computed in two steps, computing first $Q=HA^{t}$ and then P=AQ. The one-phase scheme achieved speed-up of 2.04 on Intel Itanium II platform over the two-phase scheme. Based on memory latency and modeled cache miss rates, the performance improvement was evaluated through performance modeling. Our research has impact on performance tuning study of complex sparse matrix operations, while most of the previous work focused on performance tuning of basic operations.

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Pole Placement Method to Move a Equal Poles with Jordan Block to Two Real Poles Using LQ Control and Pole's Moving-Range (LQ 제어와 근의 이동범위를 이용한 조단 블록을 갖는 중근을 두 실근으로 이동시키는 극배치 방법)

  • Park, Minho
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.19 no.2
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    • pp.608-616
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    • 2018
  • If a general nonlinear system is linearized by the successive multiplication of the 1st and 2nd order systems, then there are four types of poles in this linearized system: the pole of the 1st order system and the equal poles, two distinct real poles, and complex conjugate pair of poles of the 2nd order system. Linear Quadratic (LQ) control is a method of designing a control law that minimizes the quadratic performance index. It has the advantage of ensuring the stability of the system and the pole placement of the root of the system by weighted matrix adjustment. LQ control by the weighted matrix can move the position of the pole of the system arbitrarily, but it is difficult to set the weighting matrix by the trial and error method. This problem can be solved using the characteristic equations of the Hamiltonian system, and if the control weighting matrix is a symmetric matrix of constants, it is possible to move several poles of the system to the desired closed loop poles by applying the control law repeatedly. The paper presents a method of calculating the state weighting matrix and the control law for moving the equal poles with Jordan blocks to two real poles using the characteristic equation of the Hamiltonian system. We express this characteristic equation with a state weighting matrix by means of a trigonometric function, and we derive the relation function (${\rho},\;{\theta}$) between the equal poles and the state weighting matrix under the condition that the two real poles are the roots of the characteristic equation. Then, we obtain the moving-range of the two real poles under the condition that the state weighting matrix becomes a positive semi-finite matrix. We calculate the state weighting matrix and the control law by substituting the two real roots selected in the moving-range into the relational function. As an example, we apply the proposed method to a simple example 3rd order system.

A Multi-Level Accumulation-Based Rectification Method and Its Circuit Implementation

  • Son, Hyeon-Sik;Moon, Byungin
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.6
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    • pp.3208-3229
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    • 2017
  • Rectification is an essential procedure for simplifying the disparity extraction of stereo matching algorithms by removing vertical mismatches between left and right images. To support real-time stereo matching, studies have introduced several look-up table (LUT)- and computational logic (CL)-based rectification approaches. However, to support high-resolution images, the LUT-based approach requires considerable memory resources, and the CL-based approach requires numerous hardware resources for its circuit implementation. Thus, this paper proposes a multi-level accumulation-based rectification method as a simple CL-based method and its circuit implementation. The proposed method, which includes distortion correction, reduces addition operations by 29%, and removes multiplication operations by replacing the complex matrix computations and high-degree polynomial calculations of the conventional rectification with simple multi-level accumulations. The proposed rectification circuit can rectify $1,280{\times}720$ stereo images at a frame rate of 135 fps at a clock frequency of 125 MHz. Because the circuit is fully pipelined, it continuously generates a pair of left and right rectified pixels every cycle after 13-cycle latency plus initial image buffering time. Experimental results show that the proposed method requires significantly fewer hardware resources than the conventional method while the differences between the results of the proposed and conventional full rectifications are negligible.