• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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• pp.1093-1096
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• 2002

In this paper, a novel multi voltage inverter system is proposed for reductions of harmonics, which can compensate reactive power. At first, we remove capacitor at input side for reactive power compensation. Secondly, by adding DC voltage to the filter capacitor, it can control power factors as lead-phase according to alterations of loads at power reception. Thirdly, if winding and single phase-bridge inverter(auxiliary circuit) is installed to DC power for reduction of harmonic, waveform of output voltages become to 36-steps. Thus, SVC(static var compensator) systems which can reduce harmonics are designed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
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• pp.376-378
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• 1995

A method is presented for the design and fabrication of the temperature compensation circuits on the Clark electrodes for measuring the dissolved oxygen(DO) concentration. The discussion includes a method of the sensor interface circuits for the DO sensor. Typical polarograms for the DO probes under test using this sensor circuits are presented. High accuracy over 99 % of the I to V conversion using the proposed circuit is verified. Temperature dependence for the test DO probe is well compensated automatically using the thermistor($2k\Omega,\;25^{\circ}C$) in series with correction resistor in the feedback loop of the op-amp circuit in the temperature range of the 0-50$^{\circ}C$.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2003년도 추계종합학술대회
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• pp.315-319
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• 2003

본 논문은 Custom Power의 입력 전압 Sag 보상을 위해 사용되는 PWM Boost AC-AC 컨버터의 정적 특성 및 동적 특성의 모델링 및 해석을 다룬다. 특히 회로 DQ 변환 기법을 사용하여 기본파 영역에서 시스템의 특성을 모두 포함하는 등가회로를 구하고, 전압이득과 입력역률에 대한 해석적인 결과를 도출한다. 또한, 제어의 관점에서 유용한 일정한 동작점 하에서의 선형화된 상태방정식을 구한다. 끝으로, 시뮬레이션을 통하여 제안된 등가회로 모델링과 해석이 타당함을 확인하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.91-94
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• 2002

This paper presents a novel active common-mode EMI filter for the PWM inverter application. The proposed filter is based on the current sensing and compensation circuit and it utilizes a fast transistor amplifier for the current compensation. The amplifier utilizes an isolated low-voltage dc power supply for its biasing and it is possible to construct the active filter independent of the source voltage of the equipment. Thus the proposed active filter can be used in any application regardless of its working voltage. The effectiveness of the proposed circuit is verified by experimental results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 합동 추계학술대회 논문집 정보 및 제어부문
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• pp.601-604
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• 2002

In this paper, the timing do-skew modeling for a high speed logic tester channels is developed. The time delay of each channel in a logic tester are different from other channels and it can produce timing error in a test. To get the best timing accuracy in the test with a logic tester, the timing skew must be compensated. The timing skew of channels is due to the difference of time delay of pin-electronics devices composing channels and length of metal line placed on PCB. The expected timing difference of channels can be calculated according to the specifications of pin electronics devices and strip line modeling of PCB. With the calculated delay time, the timing skew compensation circuit has been designed. With the timing skew compensation circuit, the timing calibration of a logic tester can be peformed easily and automatically without other time measuring instruments. The calibration method can then be directly applied to logic testers in mass production lines.

• 대한의용생체공학회:의공학회지
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• 제11권1호
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• pp.13-18
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• 1990

Frequency responses of ambulatory electrocardiogram systems were measured. Phase shift was assessed by our improved Wagner's method. The characteristics of the systems were found much worse than that of ordinary ECG equipment both in gain and phase responses. The decay of -3dB in amplitude observed in 0.2Hz and the lead of 45 dog in phase was observed in 0.6Hz. In order to investigate which of these 2 responses play major role in generating false S -T deviation, mathe- matical filters were Composed in a computer and actual ECGs were fed. The false S-T deviation were found to be caused mostly by enormous lead in phase, and then, the compensation circuit to diminish the lead in phase was inserted in the commercial systemes. The compensated systems showed no false deviation in S-T segment.

• 전력전자학회논문지
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• 제19권3호
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• pp.257-265
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• 2014

This paper proposes a simple compensation method for switches of the unclamped voltage in the three-level NPC inverter. Voltages of inner-switches can be unclamped in the three-level NPC (neutral point clamped) inverter. It can cause the problem of the switch fault accident. By adding a capacitor, switches of the unclamped voltage can be clamped. Through the analysis of the circuit, the reason behind switches being unclamped was verified which leads to the solution method that designs a compensation capacitor. The proposed method was validated through the simulation and experimental results.

• 한국통신학회논문지
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• 제27권10C호
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• pp.980-986
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• 2002

하나의 클럭원으로 동기 되는 고속의 데이터 통신 시스템에서, 데이터와 클럭 사이의 다른 라우팅 경로나, 부품들의 다른 전달지연시간 또는 외부 잡음에 의한 데이터나 클럭의 불안정한 위상과 같은 여러 이유들로 인해 데이터를 잃어버릴 수가 있다. 본 논문에서는 이렇게 잃어버린 데이터를 탐지하고 원래의 데이터로 복원하여 보상 출력하는 기능을 갖는 디지털 회로를 제안하고 구현을 기술한다. 특히, 이러한 보상회로는 광 분야등과 같이 고속의 데이터 전송을 위한 통신 시스템에서 강한 안정성을 가지며 BER개선에 상당히 크게 영향을 준다. 이 회로는 Verilog HDL로 구현이 되었으며 통신 및 데이터 전송관련 디지털 ASIC구현에 기본적으로 응용이 가능하다.

• Journal of Power Electronics
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• 제18권6호
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• pp.1642-1649
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• 2018

A single-stage flyback LED AC-DC converter based on primary-side control under constant current mode is proposed in this study. The proposed converter features low total harmonic distortion (THD) and high power factor (PF). It also consists of a zero-crossing distortion compensation circuit and a variable duty ratio control compensation circuit to deal with the line current distortions caused by fixed duty ratio control. The system model and layout are built in Simplis and Cadence, respectively. The feasibility and performance of the proposed circuit is verified by designing and fabricating an IC controller in the HHNEC $0.35{\mu}m$ 5 V/40 V HVCMOS process. Experimental results show that the PF can reach a level in the range of 0.985-0.9965. Moreover, the average THD of the entire system is approximately 10%, with the minimum being 6.305%, as the input line voltage changes from 85 VAC to 265 VAC.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 추계학술대회 논문집 전기물성,응용부문
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• pp.53-55
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• 2001

A dual probe laser Doppler vibrometer (LDV) that has one laser source and provides two independent object beams has been developed for the first time. An electronic circuit that converts light signal to electronic signal has been also developed using phase locked loop(PLL). It was found that this types of dual probe LDV can be used in differential mode and self-vibration compensation mode.