• 제목/요약/키워드: Compensation Circuit

검색결과 442건 처리시간 0.027초

고속/고밀도 디지털 회로를 위한 기판을 이용하는 무왜곡 전송 구현 및 해석 (Dispersionless transmission line and the characterization using leaky circuit board for high speed and high density digital circuits)

  • 이중호;윤상기;이해영
    • 전자공학회논문지D
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    • 제35D권8호
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    • pp.1-7
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    • 1998
  • This paper reports a dispersion compensation technique to implement tje distortionless transmission line by satisfying the heaviside conditon. Because of the skin depth for aconductor, compensation condition is dependent on the freuqncy variation. For this reason, first, the resistance have been chaacterized in awide range of frequencies, and then found the effective conductivity of the substrate which satisfied the heaviside condition. The phase velocity and the characteristics impedance are prresented nearly constant over a wideband frequency range.

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한국 고속 전철 궤도회로의 수학적 모델링 (A Mathematical Model For The Track Circuit Of The Korea High Speed Line)

  • 엄정규;이왕희;조용기;유광균
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2004년도 춘계학술대회 논문집
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    • pp.1233-1239
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    • 2004
  • This study analysis the current level of the Korea High Speed Line by mathematical model of the rail and compensation capacitors. The rail and compensation capacitors are represented by transmission parameters and the analysis is processed by computer simulation.

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자체 진동 보상기능을 가진 레이저 도플러 진동측정계에 관한 연구 (Laser Doppler Vibrometer with self vibration compensation)

  • 이영진;김호성
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 하계학술대회 논문집 C
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    • pp.1838-1840
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    • 2001
  • A dual probe laser Doppler vibrometer (LDV) that has one laser source and provides two independent object beams has been developed for the first time. An electronic circuit that converts light signal to electronic signal has been also developed using digital phase locked loop(DPLL). It was found that this types of dual probe LDV can be used in differential mode and self-vibration compensation mode.

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불평형 부하의 평형화를 위한 STATCOM 제어 (STATCOM Control for Balancing the Unbalanced Loads)

  • 임수생;이은웅;김홍권
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제49권8호
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    • pp.522-528
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    • 2000
  • In this paper, a static synchronous compensator(STATCOM), which in general compensates reactive power, is proposed in order to balance the unbalanced loads. Reference values for the compensation of the unbalanced loads currents are determined by 3-phase circuit analysis result. Also the STATCOM control unit is designed considering the proposed compensation scheme for the unbalanced loads. As a result, the effectiveness of the STATCOM for balancing the load currents is verified by computer simulations.

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Novel Control Range Compensation Method in Power Factor Correction Circuit

  • Park, Youngbae;Cho, Donghye
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2012년도 전력전자학술대회 논문집
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    • pp.224-225
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    • 2012
  • When Power Factor Correction(PFC) boost converter is designed for the universal input range, unwanted burst operation can be found at high line and light load. This operation may cause an audible noise from the boost inductor or sensitive flicker for human eye can be found in case of the display application. In order to solve this difficulty, this paper proposes the new control range compensation method and shows the effectiveness than the conventional method thru the experimental result.

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Design of DC Side Voltage and Compensation Analysis of THD for Shunt Power Quality Controller under System Load of Rectifier with R-L Load

  • Zhao, Guopeng;Han, Minxiao
    • Journal of Electrical Engineering and Technology
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    • 제10권1호
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    • pp.30-40
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    • 2015
  • For a shunt power quality controller (SPQC) the DC side voltage value which is closely related to the compensation performance is a significant parameter. Buy so far, very little discussion has been conducted on this in a quantitative manner by previous publications. In this paper, a method to design the DC side voltage of SPQC is presented according to the compensation performance in the single-phase system and the three-phase system respectively. First, for the reactive current and the harmonic current compensation, a required minimal value of the DC side voltage with a zero total harmonic distortion (THD) of the source current and a unit power factor is obtained for a typical load, through the equivalent circuit analysis and the Fourier Transform analytical expressions. Second, when the DC side voltage of SPQC is lower than the above-obtained minimal value, the quantitative relationship between the DC side voltage and the THD after compensation is also elaborated using the curve diagram. Hardware experimental results verify the design method.

동적전압보상기의 전압제어를 위한 PLL 방식의 개선 (Improvement of PLL Method for Voltage Control of Dynamic Voltage Restorer)

  • 김병섭;최종우
    • 전기학회논문지
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    • 제58권5호
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    • pp.936-943
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    • 2009
  • Dynamic voltage restorer(DVR) is now more preferable enhancement than other power quality enhancement in industry to reduce the impact of voltage faults, especially voltage sags to sensitive loads. The main controllers for DVR consists of PLL(phase locked loop), compensation voltage calculator and voltage compensator. PLL detects the voltage faults and phase. Compensation voltage calculator calculates the reference voltage from the source voltage and phase. With calculated compensation voltage from PLL, voltage compensator restores the source voltage. If PLL detect ideal phase, compensation voltage calculator calculates ideal compensation voltage. Therefore, PLL for DVR is very important. This paper proposes the new method of PLL in DVR. First, the power circuit of DVR system is analyzed in order to compensate the voltage sags. Based on the analysis, new PLL for improving transient response of DVR is proposed. The proposed method uses band rejection filter(BRF) at q-axis in synchronous flame. In order to calculate compensation voltage in commercial instruments, the PQR theory is used. Proposed PLL method is demonstrated through simulation using Matlab-Simulink and experiment, and by checking load voltage, confirms operation of the DVR

A Novel Method for Compensating Phase Voltage Based on Online Calculating Compensation Time

  • Wang, Mingyu;Wang, Dafang;Zhou, Chuanwei;Liang, Xiu;Dong, Guanglin
    • Journal of Power Electronics
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    • 제19권2호
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    • pp.333-343
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    • 2019
  • Dead time and the nonideal characteristics of components all lead to phase voltage distortions. In order to eliminate the harmful effects caused by distortion, numerous methods have been proposed. The efficacy of a method mainly depends on two factors, the compensation voltage amplitude and the phase current polarity. Theoretical derivations and experiments are given to explain that both of these key factors can be deduced from the compensation time, which is defined as the error time between the ideal phase voltage duration and the actual phase voltage duration in one Pulse Width Modulation (PWM) period. Based on this regularity, a novel method for compensating phase voltage has been proposed. A simple circuit is constructed to realize the real-time feedback of the phase voltage. Utilizing the actual phase voltage, the compensation time is calculated online. Then the compensation voltage is derived. Simulation and experimental results show the feasibility and effectivity of the proposed method. They also show that the error voltage is decreased and that the waveform is improved.

A 32-Gb/s Inductorless Output Buffer Circuit with Adjustable Pre-emphasis in 65-nm CMOS

  • Tanaka, Tomoki;Kishine, Keiji;Tsuchiya, Akira;Inaba, Hiromi;Omoto, Daichi
    • IEIE Transactions on Smart Processing and Computing
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    • 제5권3호
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    • pp.207-214
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    • 2016
  • Optical communication systems are rapidly spread following increases in data traffic. In this work, a 32-Gb/s inductorless output buffer circuit with adjustable pre-emphasis is proposed. The proposed circuit consists of an output buffer circuit and an emphasis circuit. The emphasis circuit emphasizes the high frequency components and adds the characteristics of the output buffer circuit. We proposed a design method using a small-signal equivalent-circuit model and designed the compensation characteristics with a 65-nm CMOS process in detail using HSPICE simulation. We also realized adjustable emphasis characteristics by controlling the voltage. To confirm the advantages of the proposed circuit and the design method, we fabricated an output buffer IC with adjustable pre-emphasis. We measured the jitter and eye height with a 32-Gb/s input using the IC. Measurement results of double-emphasis showed that the jitter was 14% lower, and the eye height was 59% larger than single-emphasis, indicating that our proposed configuration can be applied to the design of an output buffer circuit for higher operation speed.

레이더 센서용 발진기의 양산성 향상에 관한 연구 (A Study on Improving Mass Production of the Radar Sensor Oscillator)

  • 김병철;조경래;이재범;김대형
    • 한국정보통신학회논문지
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    • 제16권4호
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    • pp.669-676
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    • 2012
  • 본 논문에서는 써미스터를 이용한 온도보상회로를 이용하여 레이더 센서의 양산성을 향상시킬 수 있는 방안을 제시하였다. 레이더 센서에 사용되는 DRO(Dielectric Resonator Oscillator)의 유전체공진기를 제거한 후, FET의 게이트에 적절한 바이어스전압을 인가할 수 있는 온도보상회로를 이용하여 정확한 발진주파수를 조정하는데 필요한 시간을 절약함으로써 양산이 용이하도록 하였는데, 본 논문에서 제안한 방법으로 제작한 레이더 센서의 출력주파수는 $-20^{\circ}C-+55^{\circ}C$의 온도범위에서 15.67MHz의 변화량을 보였으며, 출력크기의 변화는 0.65dB, 위상잡음 특성은 1MHz에서 -105.47dBc로 같은 온도범위에서 25MHz의 출력주파수 변화, 0.42dB의 출력크기 변화, -107.40 dBc의 위상잡음 특성을 보이는 유전체공진기를 이용한 발진기보다 우수하거나 비슷한 특성을 나타내었다.