• The Transactions of the Korean Institute of Power Electronics
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• v.24 no.1
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• pp.56-61
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• 2019

In this study, a reduction method of leakage current in a three-level photovoltaic power-conditioning system (PCS) is proposed and verified by simulation and experiment. Leakage current generation is analyzed through an equivalent model of the common mode voltage considering a significant parasitic capacitance existing between the photovoltaic array and ground. A leakage current reduction method using pulse-width modulation (PWM) method is also proposed, and a 10-kW three-level photovoltaic PCS simulation and experiment is performed with a $1{\mu}F$ parasitic capacitor based on 100 nF/kW. The proposed method using the PWM method is verified to reduce the leakage current by 73% compared with the conventional PWM method.

• The Transactions of the Korean Institute of Power Electronics
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• v.28 no.1
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• pp.1-7
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• 2023

A grid-connected 3-level NPC inverter is a power conversion device that connects renewable energy generators, such as photovoltaic or wind turbines to the grid. Although many studies have focused on this inverter, commercializing it requires strictly satisfying various safety and power quality-related standards. Among many standards, leakage current and grid current total harmonic distortion(THD) can be affected by external factors such as installation environment, aging, and grid conditions. Hence, inverter operations that can satisfy these standards need to be explored. In this study a 3-level NPC inverter operation algorithm using the Phase Opposition Disposition-PWM method that can effectively reduce leakage current and switching frequency adjustment to reduce THD effectively has been proposed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.81-88
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• 2006

This paper describes a new linear operational transconductance amplifier (OTA). To improve the linearity of the OTA, we employ a mobility compensation circuit that combines the transistor paths operating at the triode and subthreshold regions. The common-mode control schemes consist of a common-mode feedback (CMFB) and common-mode feedforward (CMFF). The circuit enhances linearity of the transconductance (Gm) under the wide input voltage swing range. The proposed OTA shows ${\pm}1%$ Gm variation and the total harmonic distortion (THD) of below -73dB under the input voltage swing range of ${\pm}1.1V$. The OTA is implemented using a $0.35{\mu}m$ n-well CMOS process under 3.3V supply.

• Journal of Power Electronics
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• v.15 no.2
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• pp.504-517
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• 2015

This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.

• Journal of Power Electronics
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• v.17 no.1
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• pp.136-148
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• 2017

In recent years, voltage source multilevel converters are very popular in medium/high-voltage industrial applications, among which the NPC/H-Bridge converter is a popular solution to the medium/high-voltage drive systems. The conventional finite control set model predictive control (FCS-MPC) strategy is not practical for multilevel converters due to their substantial calculation requirements, especially under high number of voltage levels. To solve this problem, a hierarchical model predictive voltage control (HMPVC) strategy with referring to the implementation of g-h coordinate space vector modulation (SVM) is proposed. By the hierarchical structure of different cost functions, load currents can be controlled well and common mode voltage can be maintained at low values. The proposed strategy could be easily expanded to the systems with high number of voltage levels while the amount of required calculation is significantly reduced and the advantages of the conventional FCS-MPC strategy are reserved. In addition, a HMPVC-based field oriented control scheme is applied to a drive system with the NPC/H-Bridge converter. Both steady-state and transient performances are evaluated by simulations and experiments with a down-scaled NPC/H-Bridge converter prototype under various conditions, which validate the proposed HMPVC strategy.

• The Journal of the Korea Contents Association
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• v.6 no.3
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• pp.38-45
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• 2006

A dual-level low voltage differential signalling (DLVDS) circuit is proposed aiming at reducing transmission lines for a LCD driver IC. We apply two data to the proposed DLVDS circuit as inputs. Then, the transmitter converts two inputs to two kinds of fully differential signals. In this circuit, two transmission lines are sufficient to transfer two inputs while keeping the LVDS feature. However, the circuit has a common mode bias fluctuation due to difference of the input bias and the reference bias. We compensate the common mode bias fluctuation using a feedback circuit of the current source bias. The receiver recovers the original input data through a level decoding circuit. We fabricated the proposed circuit using $0.25{\mu}m$ CMOS technology. The simulation results of proposed circuit shows 1-Gbps/2-line data rate and 35mW power consumption at 2.5V supply voltage, respectively.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.4
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• pp.267-272
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• 2010

In this paper, a Gm-C LPF utilizing common-mode feedforward (CMFF) CMOS inverter type operational transconductance amplifier (OTA) has been designed and verified by circuit simulations. The CMFF CMOS inverter OTA was optimized for wide input linearity and low current consumption using a standard 0.18 ${\mu}m$ CMOS process; gm of 100 ${\mu}S$ and current of 100 ${\mu}A$ at supplied voltage of 1.3 V. Using this optimized CMFF CMOS inverter type OTA, an elliptic 5th order Gm-C LPF for GPS specifications was designed. Gain and frequency tuning of the LPF was done by changing the internal supply voltages. The designed Gm-C LPF gave pass-band ripple of 1.6 dB, stop-band attenuation of 60.8 dB, current consumption of 0.60 mA at supply voltage of 1.2 V. The gain and frequency characteristics of designed Gm-C LPF was unchanged even though the input common-mode voltage is varied.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.2B no.3
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• pp.115-124
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• 2002

This paper presents an active auxiliary edge-resonant DC link snubber with a ringing surge damper and a three-phase voltage source type zero voltage soft-switching inverter with the resonat snubber treated here for the AC servo motor driver applications. The operation of the active auxiliary edge-resonant DC link snubber circuit with PWM voltage is described, together with the practical design method to select its circuit parameters. The three-phase voltage source type soft-switching inverter with a single edge-resonant DC link snubber treated here is evaluated and discussed for the small-scale permanent magnet (PM) type-AC servo motor driver from an experimental point of view. In addition to these, the AC motor stator current and its motor speed response for the proposed three-phase soft-switching inverter employing Intelligent Power Module(IPM) based on IGBTS are compared with those of the conventional three-phase hard-switching inverter using IPM. The practical effectiveness of the three-phase soft-switching inverter-fed permanent magnet type AC motor speed tracking servo driver is proven on the basis of the common mode current in a novel type three-phase soft-switching inverter-fed AC motor side and the conductive noise on the mains terminal interface voltage as compared with those of the conventional three-phase hard-switching inverter-fed permanent magnet type AC servo motor driver for the speed tracking applications.

• Journal of Power Electronics
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• v.19 no.2
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• pp.403-412
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• 2019

Aiming at the problems of large dv/dt and di/dt in traditional single-ended converters and high electromagnetic interference (EMI) noise levels, a single-ended isolated converter using the secondary resonance technique is proposed in this paper. In the proposed converter, the voltage stress of the main power switch can be reduced and the voltage across the output diode is clamped to the output voltage when compared to the conventional flyback converter. In addition, the peak current stress through the main power switch can be decreased and zero current switching (ZCS) of the output diode can be achieved through the resonance technique. Moreover, the EMI noise coupling path and an equivalent model of the proposed converter topology are presented through the operational principle of the proposed converter. Analysis results indicate that the common mode (CM) EMI noise and the differential mode (DM) EMI noise of such a converter are deduced since the frequency spectra of the equivalent controlled voltage sources and controlled current source are decreased when compared with the traditional flyback converter. Furthermore, appropriate parameter selection of the resonant circuit network can increase the equivalent impedance in the EMI coupling path in the low frequency range, which further reduces the common mode interference. Finally, a simulation model and a 60W experimental prototype of the proposed converter are built and tested. Experimental results verify the theoretical analysis.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.6
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• pp.546-552
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• 2012

This paper presents an active anti-islanding detection method using negative sequence voltage injection to the grid through a three-phase photovoltaic inverters. Because islanding operation mode can cause a variety of problems, the islanding detection of grid-connected photovoltaic inverter is the mandatory feature. The islanding mode is detected by measuring the magnitude of negative sequence impedance calculated by the negative sequence voltage and current at the point of common coupling. Simulation and experimental test are performed to verify the effectiveness of the proposed method which can detect the islanding mode in the specified time. The test has been done in accordance with the condition on IEEE Std 929-2000.