• Title/Summary/Keyword: Common-Mode Inductor

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Common Mode Noise Reduction for an LLC Resonant Converter by Using Passive Noise Cancellation

  • Ryu, Younggon;Kim, Sungnam;Jeong, Geunseok;Park, Jaesu;Kim, Duil;Park, Jongwook;Kim, Jingook;Han, Ki Jin
    • Journal of electromagnetic engineering and science
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    • v.15 no.2
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    • pp.89-96
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    • 2015
  • This paper describes the application of a passive noise cancellation method to a prototype inductor-inductor-capacitor (LLC) resonant converter by placing a compensation winding in a transformer to reduce common mode noise. The connection method for the compensation winding is investigated. A circuit analysis is implemented for the displacement currents between the primary and secondary windings in the transformer. The analyzed displacement currents are verified by performing a circuit simulation and a proper compensation winding connection that reduces common mode noise is found. The measurement results show that common mode noise is reduced effectively up to 20 dB in the 1 to 7 MHz frequency region for the prototype LLC resonant converter by using the proposed passive noise cancellation method.

High Efficiency Bridgeless Power Factor Correction Converter With Improved Common Mode Noise Characteristics (우수한 공통 모드 노이즈 특성을 가진 브릿지 다이오드가 없는 고효율 PFC 컨버터)

  • Jang, Hyo-Seo;Lee, Ju-Young;Kim, Moon-Young;Kang, Jeong-Il;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.2
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    • pp.85-91
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    • 2022
  • This study proposes a high efficiency bridgeless Power Factor Correction (PFC) converter with improved common mode noise characteristics. Conventional PFC has limitations due to low efficiency and enlarged heat sink from considerable conduction loss of bridge diode. By applying a Common Mode (CM) coupled inductor, the proposed bridgeless PFC converter generates less conduction loss as only a small magnetizing current of the CM coupled inductor flows through the input diode, thereby reducing or removing heat sink. The input diode is alternately conducted every half cycle of 60 Hz AC input voltage while a negative node of AC input voltage is always connected to the ground, thus improving common mode noise characteristics. With the aim to improve switching loss and reverse recovery of output diode, the proposed circuit employs Critical Conduction Mode (CrM) operation and it features a simple Zero Current Detection (ZCD) circuit for the CrM. In addition, the input current sensing is possible with the shunt resistor instead of the expensive current sensor. Experimental results through 480 W prototype are presented to verify the validity of the proposed circuit.

EMC Debugging Technique for Image Equipments (영상기기의 EMC Debugging 기술)

  • Song, Min-jong;Kim, Jin-Sa
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.35 no.2
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    • pp.143-148
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    • 2022
  • For the purpose of treating health checkups and recovery of patients in a super-aged society, hospitals use devices designed with a reduction circuit of electromagnetic waves associated with the specific absorption rate of electromagnetic waves absorbed by the human body. In this paper, we proposed a filter improvement design method capable of reducing electromagnetic waves. As a result of confirming the validity of the proposed technique through simulation and experimental results, the following result values were obtained. Applying the common-mode (CM) inductor 4 mH to a calibration circuit, noise decreased in a multiband spectrum. Using the differential mode(DM) inductor 40 µH element in the primary calibration circuit, the noise decreased by 15 dB or more in the 3 MHz band spectrum. Also, applying the Admittance Capacitance (Y-Cap) 10 nF element in the secondary calibration circuit resulted in the decrease by more than 30 dB in the band spectrum before 2 MHz. After using a common-mode inductor 4 mH element in the tertiary calibration circuit, it decreased by more than 15 dB in the band spectrum after 2 MHz.

Design and Fabrication of 0.25 μm CMOS TIA Using Active Inductor Shunt Peaking (능동형 인덕터 Shuut Peaking을 이용한 0.25 μm CMOS TIA 설계 및 제작)

  • Cho In-Ho;Lim Yeongseog
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.9 s.100
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    • pp.957-963
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    • 2005
  • This paper presents technique of wideband TIA for optical communication systems using TSMC 0.25 ${\mu}m$ CMOS RF-Mixed mode. In order to improve bandwidth characteristics of an TIA, we use active inductor shunt peaking to cascode and common-source configuration. The result shows the 37 mW and 45 mW power dissipation with 2.5 V bias and 61 dB$\Omega$ and 61.4 dB$\Omega$ transimpedance gain. And the -3 dB bandwidth of the TIA is enhanced from 0.8 GHz to 1.45 GHz in cascode and 0.61 GHz to 0.9 GHz in common-source. And the input noise current density is $5 pA/\sqrt{Hz}$ and $4.5 pA/\sqrt{Hz}$, and -10 dB out put return loss is obtained in 1.45 GHz. The total size of the chip is $1150{\times}940{\mu}m^2$.

Droop Method for High-Capacity Parallel Inverters in Islanded Mode Using Virtual Inductor (독립운전 모드에서 가상 인덕터를 활용한 대용량 인버터 병렬운전을 위한 드룹제어)

  • Jung, Kyo-Sun;Lim, Kyung-Bae;Kim, Dong-Hwan;Choi, Jaeho
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.1
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    • pp.81-90
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    • 2015
  • This paper investigates the droop control-based real and reactive power load sharing with a virtual inductor when the line impedance between inverter and Point of Common Coupling (PCC) is partly and unequally resistive in high-capacity systems. In this paper, the virtual inductor method is applied to parallel inverter systems with resistive and inductive line impedance. Reactive power sharing error has been improved by applying droop control after considering each line impedance voltage drop. However, in high capacity parallel systems with large output current, the reference output voltage, which is the output of droop controller, becomes lower than the rated value because of the high voltage drop from virtual inductance. Hence, line impedance voltage drop has been added to the droop equation so that parallel inverters operate within the range of rated output voltage. Additionally, the virtual inductor value has been selected via small signal modeling to analyze stability in transient conditions. Finally, the proposed droop method has been verified by MATLAB and PSIM simulation.

Design of EMI filters for an Induction Motor Drive System with Multi-level inverters (멀티레벨 인버터를 이용한 3상 유도전동기 구동 시스템의 EMI 필터 설계)

  • Kim, Soo-Hong;Ahn, Young-Oh;Bang, Sang-Seok;Kim, Kwang-Seob;Kim, Yoon-Ho
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.5
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    • pp.265-270
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    • 2006
  • In this paper EMI problems with induction motor drive system using multi-level inverters are investigated. The high power multi-level inverter usually operates with low switching frequency and produces large noises. Generally, EMI consists of the conduction component through source lines and emission component emitted to the space. This conduction component can be classified to the common-mode between source line and ground, and the normal-mode between lines. The EMI filters for the induction motor drive system are designed and implemented to reduce EMI noise. Finally the designed system is verified by the experiment. The experimental results show that both the normal mode and common mode noises are greatly reduced compared to the system without filters.

Characteristic Analysis of Noise Filter (노이즈필터의 특성 해석)

  • Kwon, Jin-Uk;Min, Een-Kyu;Youn, Duck-Yong;Hong, Soon-Chan
    • Proceedings of the KIEE Conference
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    • 1993.07b
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    • pp.794-796
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    • 1993
  • This paper deals with the characteristic analysis of noise filter for the reduction of conduction noise, especially, common-mode noise. Attenuation in the system containing noise filter is analyzed and equivalent circuits for common- and differential- mode noise are derived. To clarify the effects by parasitic components of the inductor and capacitor, digital simulations using Design Center are carried out.

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Design of Single-Inductor Dual-Output Boost-Boost DC-DC Converter with Dual Feedback Loop Based on Relative Sawtooth Generator (Dead-time을 갖는 톱니파 발생기를 이용한 이중 피드백 루프 기반 단일 인덕터 이중 출력 승압형 변압기 설계)

  • Yun, Dam;Kim, Dong-Young;Lee, Kang-Yoon
    • Journal of IKEEE
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    • v.18 no.2
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    • pp.220-227
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    • 2014
  • This paper presents a control method of Single-Inductor Dual-Output DC-DC Converter using Common mode feedback and differential feedback loops. To generate duty used for differential mode feedback loop, this paper propose relative sawtooth circuit using current divider circuit which makes ramp signal with variable dead-time. Two outputs of the Single-Inductor Dual-Output DC-DC Converter are specified for 2.8 V and 4.2 V with input voltage 2.5 V. The maximum conversion efficiency of designed SIDO DC-DC Converter is 95% at total output power of 539mW. Cross regulations of Boost1 and Boost2 are 3.57% and 4% each, when increasing twice times output current.

A 2.5Gb/s 2:1 Multiplexer Design Using Inductive Peaking in $0.18{\mu}m$ CMOS Technology (Micro spiral inductor를 이용한 2.5Gb/s급 2:1 Multiplexer 설계)

  • Kim, Sun-Jung;Choi, Jung-Myung;Burm, Jin-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.8
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    • pp.22-29
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    • 2007
  • A 2.5Gb/s 2:1 multiplexer(MUX) IC using $0.18{\mu}m$ CMOS was designed and fabricated. Inductive peaking technology was used to improve the performance. On-chip micro spiral inductor was designed to maximize the inductive peaking effect without increasing the chip area much. The designed 4.7 nH micro-spiral inductor was $20\times20{\mu}m2$ in size. 2:1 MUX with and without micro spiral inductors were compared. The rise and fall time was improved more than 23% and 3% respectively using the micro spiral inductors for 1.25Gb/s signal. For 2.5 Gb/s signal, fall and rise time was improved 5.3% and 3.5% respectively. It consumed 61mW and voltage output swing was 1$180mV_{p-p}$ at 2.5Gb/s.

Design and Analysis of Phase-Shift Full-Bridge LDC using Common Mode Coupled Inductor (커먼모드 커플드 인덕터를 적용한 위상천이 풀브리지 컨버터 LDC 설계 및 분석)

  • Choi, Jin-Yong;Heo, Gyeong-Hyeon;Lee, Woo-Seok;Choi, Seung-Won;Lee, IL-Oun;Lee, Jun-Young;Lee, Seung-Jun;Oh, Kwang-Ho;Lee, Sang-Hyeok
    • Proceedings of the KIPE Conference
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    • 2019.07a
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    • pp.20-22
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    • 2019
  • 본 논문에서 공통모드 커플드 인덕터(Common Mode Coupled Inducter, CMCI)를 적용한 2단 직렬 위상천이 풀브리지 컨버터를 제안한다. 제안하는 위상천이 풀브리지 컨버터는 고주파수로 동작하며, 높은 입력전압에 대응할 수 있다. 풀브리지를 직렬로 쌓은 구조로 상단 풀브리지 컨버터와 하단 풀브리지 컨버터가 동시에 스위칭 한다. 2차측은 센터텝 정류기를 사용하여 풀브리지 정류기에 비해 다이오드 전압강하가 절반이라는 장점을 가진다. 또한, 변압기에 CMCI를 적용하여 1차측 상단과 하단의 전류 균형을 유지하도록 구성하였다. 제안하는 위상천이 풀브리지 컨버터의 5.8kW급 시제품을 제작하여 그 타당성을 검증하였다.

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