• 제목/요약/키워드: Clock-Counter

검색결과 61건 처리시간 0.031초

LiDAR 시스템용 절대시간 측정을 위한 위상고정루프 기반 시간 디지털 변환기 설계 (Design of Phase Locked Loop (PLL) based Time to Digital Converter for LiDAR System with Measurement of Absolute Time Difference)

  • 유상선
    • 한국정보통신학회논문지
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    • 제25권5호
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    • pp.677-684
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    • 2021
  • 본 논문은 절대 시간 측정 가능한 시간 디지털 변환기에 대한 논문으로 제안하는 시간 디지털 변환기는 0.18-um CMOS 공정을 이용하여 설계 되었고 IC로 제작하여 검증하였다. 설계된 시간 디지털 변환기는 라이다 시스템에 적용하기 위하여 긴 측정시간과 절대적인 50ps를 측정할 수 있어야하는데 위상고정루프의 625MHz 클록을 기준클록으로 사용하기 때문에 절대시간의 측정이 가능하며 디지털 보정회로를 이용하여 어떤 상황에서 든 50ps의 분해능을 가질 수 있다. 기준클록을 카운터하여 큰 시간 단위의 측정을 할 수 있어 최대 800ns의 시간이 측정가능하고 딜레이 체인을 이용하여 정밀한 시간 값을 측정 할 수 있다. 결과적으로 제작된 시간 디지털 변환기는 50ps 단위로 시간을 측정할 수 있는데 최대 오차는 INL 0.8-LSB정도이며 1.8V 인가전압에 전력 소모는 약 70mW 정도이다.

A Low Power 16-Bit RISC Microprocessor Using ECRL Circuits

  • Shin, Young-Joon;Lee, Chan-Ho;Moon, Yong
    • ETRI Journal
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    • 제26권6호
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    • pp.513-519
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    • 2004
  • This paper presents a low power 16-bit adiabatic reduced instruction set computer (RISC) microprocessor with efficient charge recovery logic (ECRL) registers. The processor consists of registers, a control block, a register file, a program counter, and an arithmetic and logical unit (ALU). Adiabatic circuits based on ECRL are designed using a $0.35{\mu}m$ CMOS technology. An adiabatic latch based on ECRL is proposed for signal interfaces for the first time, and an efficient four-phase supply clock generator is designed to provide power for the adiabatic processor. A static CMOS processor with the same architecture is designed to compare the energy consumption of adiabatic and non-adiabatic microprocessors. Simulation results show that the power consumption of the adiabatic microprocessor is about 1/3 compared to that of the static CMOS microprocessor.

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A Fully Differential RC Calibrator for Accurate Cut-off Frequency of a Programmable Channel Selection Filter

  • Nam, Ilku;Choi, Chihoon;Lee, Ockgoo;Moon, Hyunwon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권5호
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    • pp.682-686
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    • 2016
  • A fully differential RC calibrator for accurate cut-off frequency of a programmable channel selection filter is proposed. The proposed RC calibrator consists of an RC timer, clock generator, synchronous counter, digital comparator, and control block. To verify the proposed RC calibrator, a six-order Chebyshev programmable low-pass filter with adjustable 3 dB cut-off frequency, which is controlled by the proposed RC calibrator, was implemented in a $0.18-{\mu}m$ CMOS technology. The channel selection filter with the proposed RC calibrator draws 1.8 mA from a 1.8 V supply voltage and the measured 3 dB cut-off frequencies of the channel selection LPF is controlled accurately by the RC calibrator.

적은 면적을 갖는 저전력, 고해상도 확장 개수 A/D 변환기 설계 (A Design of Low Power, High Resolution Extended-Counting A/D Converter with Small Chip Area)

  • 김정열;임신일
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(5)
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    • pp.47-50
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    • 2002
  • An extended-counting analog to digital converter (ADC) is designed to have a high resolution(14bit) with low power consumption and small dia area. First order sigma-delta modulator with a simple counter for incremental operation eliminates the need of big decimation filter in conventional sigma-delta type ADC. To improve the accuracy and linearity, extended mode of successive approximation is followed. For 14-bit conversion operation, total 263 clocks(1 clock for reset, 256 clocks for incremental operation and extended 6 clocks for successive approximation operation) are needed with the sampling rate of 10 Ms/s This ADC is implemented in a 0.6um standard CMOS technology with a die area of 1 mm ${\times}$ 0.75 mm.

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중금속 검출용 고감도 나노표지센서 구현을 위한 볼타메트리 시스템 설계 연구 (A Study on Voltammetry System Design for Realizing High Sensitivity Nano-Labeled Sensor of Detecting Heavy Metals)

  • 김주명;이창규
    • 한국분말재료학회지
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    • 제19권4호
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    • pp.297-303
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    • 2012
  • In this study, voltammetry system for realizing high sensitivity nano-labeled sensor of detecting heavy metals was designed, and optimal system operating conditions were determined. High precision digital to analog converter (DAC) circuit was designed to control applied unit voltage at working electrode and analog to digital converter (ADC) circuit was designed to measure the current range of $0.1{\sim}1000{\mu}A$ at counter electrode. Main control unit (MCU) circuit for controlling voltammetry system with 150 MHz clock speed, main memory circuit for the mathematical operation processing of the measured current value and independent power circuit for analog/digital circuit parts to reduce various noise were designed. From result of voltammetry system operation, oxidation current peaks which are proportional to the concentrations of Zn, Cd and Pb ions were found at each oxidation potential with high precision.

유체속도 측정을 위한 레이저 도플러 유속계의 구성에 관한 연구 (A Study on the Construction of LDV System for a Measurement of the Fluid Velocity)

  • 최종원;조재흥;정명세
    • 전자공학회논문지A
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    • 제28A권5호
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    • pp.361-369
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    • 1991
  • The optics and the signal processor of dual beam laser Doppler velocimeter(LDV) was fabricated. By using the dual beam and the forward scattering, the optics part of LDV was fabricated. And the signal processor of LDV was designed by the frequency counter type using new 11:6 period timing device in order to remove error signals, and was made of the reference clock of a 500 MHz ECL oscillator. Doppler frequencies from 10KHz to 70MHz can be measured using the signal processor. In the accuracy of the period counting part, from 1.81x10**-4% to 1.27% is estimated, and in the accuracy of the validation logic part, from 0.78% to 14.78% is estimated.

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복소유전률 측정장치의 연구개발 - 컴퓨터제어 복소유전률 측정장치 - (A study on the computer-controlled measuring device of complex dielectric constant)

  • 남징락;엄상오;강대하
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 하계학술대회 논문집 B
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    • pp.1206-1208
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    • 1993
  • This paper is to study and realize a measuring device for complex dielectric constants. The device is consisted in order of interface unit, external RAM, programmable counter, D/A converter, measuring circuit, Sample & Hold circuit, A/D converter and related control circuits. Various excitation waves are digitalized and sent to the 4096 static RAM by personal computer. These data saved in the RAM are converted to analog excitation waves through D/A converter. The frequency of excitation wave is depend on the read-out speed of the RAM according to clock pulses. Such generated waves are applied to dielectrics under test and their responses are sampled and converted to digital data through A/D converter. The computer takes the digital data and calculates finally the complex dielectric constants. The frequencies for Measurement ranges from 0.04 Hz to 10 kHz.

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Development of Chip-based Precision Motion Controller

  • Cho, Jung-Uk;Jeon, Jae-Wook
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2003년도 ICCAS
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    • pp.1022-1027
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    • 2003
  • The Motion controllers provide the sophisticated performance and enhanced capabilities we can see in the movements of robotic systems. Several types of motion controllers are available, some based on the kind of overall control system in use. PLC (Programmable Logic Controller)-based motion controllers still predominate. The many peoples use MCU (Micro Controller Unit)-based board level motion controllers and will continue to in the near-term future. These motion controllers control a variety motor system like robotic systems. Generally, They consist of large and complex circuits. PLC-based motion controller consists of high performance PLC, development tool, and application specific software. It can be cause to generate several problems that are large size and space, much cabling, and additional high coasts. MCU-based motion controller consists of memories like ROM and RAM, I/O interface ports, and decoder in order to operate MCU. Additionally, it needs DPRAM to communicate with host PC, counter to get position information of motor by using encoder signal, additional circuits to control servo, and application specific software to generate a various velocity profiles. It can be causes to generate several problems that are overall system complexity, large size and space, much cabling, large power consumption and additional high costs. Also, it needs much times to calculate velocity profile because of generating by software method and don't generate various velocity profiles like arbitrary velocity profile. Therefore, It is hard to generate expected various velocity profiles. And further, to embed real-time OS (Operating System) is considered for more reliable motion control. In this paper, the structure of chip-based precision motion controller is proposed to solve above-mentioned problems of control systems. This proposed motion controller is designed with a FPGA (Field Programmable Gate Arrays) by using the VHDL (Very high speed integrated circuit Hardware Description Language) and Handel-C that is program language for deign hardware. This motion controller consists of Velocity Profile Generator (VPG) part to generate expected various velocity profiles, PCI Interface part to communicate with host PC, Feedback Counter part to get position information by using encoder signal, Clock Generator to generate expected various clock signal, Controller part to control position of motor with generated velocity profile and position information, and Data Converter part to convert and transmit compatible data to D/A converter.

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DDR SDRAM을 위한 저전압 1.8V 광대역 50∼500MHz Delay Locked Loop의 설계 (Design of Low Voltage 1.8V, Wide Range 50∼500MHz Delay Locked Loop for DDR SDRAM)

  • 구인재;정강민
    • 정보처리학회논문지A
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    • 제10A권3호
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    • pp.247-254
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    • 2003
  • 본 연구에서 고속 데이터 전송을 위해 Double Data Rate(DDR) 방식을 사용하는 SDRAM에 내장할 수 있는 저전압 광대역 Delay Locked Loop(DLL) 회로를 설계하였다. 고해상도와 빠른 Lock-on 시간을 위하여 새로운 유형의 위상검출기론 설계하였고 카운터 및 Indicator 등 내장회로의 빠른 동작을 위해 Dual-Data Dual-Clock 플립플롭(DCDD FF)에 기반을 둔 설계를 수행하였으며 이 FF을 사용하므로서 소자수를 70% 정도 감소시킬 수 있었다. Delay Line 중에서 Coarse 부분은 0.2ns 이하까지 검출 가능하며 위상오차를 더욱 감소시키고 빠른 Lock-on 기간을 얻기 위해 Fine 부분에 3-step Vernier Line을 설계하였다. 이 방식을 사용한 본 DLL의 위상오차는 매우 적고 25ps 정도이다. 본 DLL의 Locking 범위는 50∼500MHz로 넓으며 5 클럭 이내의 빠른 Locking을 얻을 수 있다. 0.25um CMOS 공정에서 1.8V 공급전압 사용시 소비전류는 500MHZ 주파수에서 32mA이다. 본 DLL은 고주파 통신 시스템의 동기화와 같은 다른 응용면에도 이용할 수 있다.

모드 전환 제어 가능한 듀얼 모드 벅 변환기 (Dual Mode Buck Converter Capable of Changing Modes)

  • 조용민;이태헌;김종구;윤광섭
    • 전자공학회논문지
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    • 제53권10호
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    • pp.40-47
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    • 2016
  • 본 논문에서는 휴대기기에 적합한 모드 전환 제어 가능한 듀얼 모드 벅 변환기를 제안한다. 기존의 모드 제어 회로는 부하의 변동이 급격하거나 천천히 변동하거나 둘 중 하나의 조건에서만 모드 전환이 이루어지는 문제점을 슬로우 클럭을 이용한 모드 제어 회로 기법으로 해결하였다. 그리고 PFM(Pulse Frequency Modulation) 모드에서 PWM(Pulse Width Modulation) 벅 변환기로 전환할 때에도 카운터를 사용하여 고부하를 감지할 수 있도록 하였으며 3비트의 디지털 신호로 20mA~90mA내에서 모드 전환 시점을 선택할 수 있도록 설계하였다. 이 회로는 BCDMOS 0.18um 2-poly 3-metal 공정으로 제작되었으며, 측정 결과 입력전압 3.7V, 출력전압 1.2V 부하 전류 10uA~500mA 범위에서 32mV 이하의 출력 전압 리플을 가지며 86%의 최대 전력 변환 효율을 나타내었다.