• Title/Summary/Keyword: Clamp circuits

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Analysis of Current Fed Full Bridge DC-DC Converter with Active Clamp (능동 클램프형 전류형 단상 풀브리지 DC-DC 컨버터의 동작 해석)

  • Cha, Han-Ju;Choi, Soon-Ho;Ahn, Chi-Hyung
    • Proceedings of the KIEE Conference
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    • 2007.04c
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    • pp.205-207
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    • 2007
  • Isolated Current fed full-bridge converter with active clamp is analyzed in this paper. An active clamp branch is used for limiting the voltage overshoot in the bridge switches and rectifier diodes. Zero voltage switching(ZVS) is also realized by using the energy stored in the transformer leakage inductance. To analyze the converter, 6 modes of operation are introduced and investigated. For each of the modes, voltage and current equations are derived together with corresponding equivalent circuits. 200W prototype dc-dc converter is assembled and verifies the effectiveness of the analysis and simulation.

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Active-clamp current-fed push-pull converter (능동 클램프를 이용한 전류원 푸쉬풀 컨버터)

  • Kim, Sang-Sik;Kwon, Bong-Hwan
    • Proceedings of the KIEE Conference
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    • 2006.07b
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    • pp.1006-1007
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    • 2006
  • An active-clamp current-fed push-pull converter for the step-up application is proposed. The proposed converter is composed of active-clamp circuits and a voltage doubler rectifier. Thus, the voltage stress of the main switches is reduced and the output diodes are clamped to output voltage. Moreover, the output diodes can achieve zero current switching (ZCS) by the series resonance between resonant capacitors and leakage inductances. The prototype is designed for 350V/1.5kW with input voltage range $30{\sim}60V$. The theoretical analysis and experimental results are presented.

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High Efficiency Active Clamp Forward Converter with Synchronous Switch Controlled ZVS Operation

  • Lee Sung-Sae;Choi Seong-Wook;Moon Gun-Woo
    • Journal of Power Electronics
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    • v.6 no.2
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    • pp.131-138
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    • 2006
  • An active clamp ZVS PWM forward converter using a secondary synchronous switch control is proposed in this paper. The proposed converter is suitable for low-voltage and high-current applications. The structure of the proposed converter is the same as a conventional active clamp forward converter. However, since it controls the secondary synchronous switch to build up the primary current during a very short period of time, the ZVS operation is easily achieved without any additional conduction losses of magnetizing current in the transformer and clamp circuit. Furthermore, there are no additional circuits required for the ZVS operation of power switches. Therefore, the proposed converter can achieve high efficiency with low EMI noise, resulting from soft switching without any additional conduction losses, and shows high power dens~ty, a result of high efficiency, and requires no additional components. The operational principle and design example are presented. Experimental results demonstrate that the proposed converter can achieve an excellent ZVS performance throughout all load conditions and demonstrates significant improvement in efficiency for the 100W (5V, 20A) prototype converter.

A 12-kV HBM ESD Power Clamp Circuit with Latchup-Free Design for High-Voltage Integrated Circuits (고전압 집적회로를 위한 래치업-프리 구조의 HBM 12kV ESD 보호회로)

  • Park, Jae-Young;Song, Jong-Kyu;Jang, Chang-Soo;Kim, San-Hong;Jung, Won-Young;Kim, Taek-Soo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.1-6
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    • 2009
  • The holding voltage of high-voltage devices under the snapback breakdown condition has been known to be much smaller than the operating voltage. Such characteristics cause high-voltage ICs to be susceptible to the transient latch-up failure in the practical system applications, especially when these devices are used as the ESD(ElectroStatic Discharge) power clamp circuit. A new latchup-free design of the ESD power clamp circuit with stacked-bipolar devices is proposed and successfully verified in a $0.35{\mu}m$ 3.3V/60V BCD(Bipolar-CMOS-DMOS) process to achieve the desired ESD level. The total holding voltage of the stacked-bipolar devices in the snapback breakdown condition can be larger than the operating voltage. Proposed power clamp operates safely because of the high holding voltage. From the measurement on the devices fabricated using a $0.35{\mu}m$ BCD Process, it was observed that the proposed ESD power clamp can provide 800% higher ESD robustness per silicon area as compared to the conventional clamps with a high-voltage diode.

High Step-up Active-Clamp Converter with an Input Current Doubler and a Symmetrical Switched-Capacitor Circuit

  • He, Liangzong;Zeng, Tao;Li, Tong;Liao, Yuxian;Zhou, Wei
    • Journal of Power Electronics
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    • v.15 no.3
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    • pp.587-601
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    • 2015
  • A high step-up dc-dc converter is proposed for photovoltaic power systems in this paper. The proposed converter consists of an input current doubler, a symmetrical switched-capacitor doubler and an active-clamp circuit. The input current doubler minimizes the input current ripple. The symmetrical switched-capacitor doubler is composed of two symmetrical quasi-resonant switched-capacitor circuits, which share the leakage inductance of the transformer as a resonant inductor. The rectifier diodes (switched-capacitor circuit) are turned off at the zero current switching (ZCS) condition, so that the reverse-recovery problem of the diodes is removed. In addition, the symmetrical structure results in an output voltage ripple reduction because the voltage ripples of the charge/pump capacitors cancel each other out. Meanwhile, the voltage stress of the rectifier diodes is clamped at half of the output voltage. In addition, the active-clamp circuit clamps the voltage surges of the switches and recycles the energy of the transformer leakage inductance. Furthermore, pulse-width modulation plus phase angle shift (PPAS) is employed to control the output voltage. The operation principle of the converter is analyzed and experimental results obtained from a 400W prototype are presented to validate the performance of the proposed converter.

Partial O-state Clamping PWM Method for Three-Level NPC Inverter with a SiC Clamp Diode

  • Ku, Nam-Joon;Kim, Rae-Young;Hyun, Dong-Seok
    • Journal of Electrical Engineering and Technology
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    • v.10 no.3
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    • pp.1066-1074
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    • 2015
  • This paper presents the reverse recovery characteristic according to the change of switching states when Si diode and SiC diode are used as clamp diode and proposes a method to minimize the switching loss containing the reverse recovery loss in the neutral-point-clamped inverter at low modulation index. The previous papers introduce many multiple circuits replacing Si diode with SiC diode to reduce the switching loss. In the neutral-point-clamped inverter, the switching loss can be also reduced by replacing device in the clamp diode. However, the switching loss in IGBT is large and the reduced switching loss cannot be still neglected. It is expected that the reverse recovery effect can be infrequent and the switching loss can be considerably reduced by the proposed method. Therefore, it is also possible to operate the inverter at the higher frequency with the better system efficiency and reduce the volume, weight and cost of filters and heatsink. The effectiveness of the proposed method is verified by numerical analysis and experiment results.

Analysis and Implementation of a New Single Switch, High Voltage Gain DC-DC Converter with a Wide CCM Operation Range and Reduced Components Voltage Stress

  • Honarjoo, Babak;Madani, Seyed M.;Niroomand, Mehdi;Adib, Ehsan
    • Journal of Power Electronics
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    • v.18 no.1
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    • pp.11-22
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    • 2018
  • This paper presents a single switch, high step-up, non-isolated dc-dc converter suitable for renewable energy applications. The proposed converter is composed of a coupled inductor, a passive clamp circuit, a switched capacitor and voltage lift circuits. The passive clamp recovers the leakage inductance energy of the coupled inductor and limits the voltage spike on the switch. The configuration of the passive clamp and switched capacitor circuit increases the voltage gain. A wide continuous conduction mode (CCM) operation range, a low turn ratio for the coupled inductor, low voltage stress on the switch, switch turn on under almost zero current switching (ZCS), low voltage stress on the diodes, leakage inductance energy recovery, high efficiency and a high voltage gain without a large duty cycle are the benefits of this converter. The steady state operation of the converter in the continuous conduction mode (CCM) and discontinuous conduction mode (DCM) is discussed and analyzed. A 200W prototype converter with a 28V input and a 380V output voltage is implemented and tested to verify the theoretical analysis.

Comparison of Active-Clamp and ZVT Techniques Applied to Tapped-Inductor DC-DC Converter with Low Voltage and Large Current

  • Abe Seiya;Ninomiya Tamotsu
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.222-226
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    • 2001
  • This paper compares three kinds of soft-switching circuits from viewpoints of surge suppression, load characteristic, and power efficiency for a tapped-inductor buck converter with low voltage and high current. As a result, these soft-switching techniques have achieved much higher efficiency of $80\%$ when compared with a hard-switching buck converter for the output condition of 1V and 20A.

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Performances Comparison of Interleaved Converter for Distributed Power System (분산 전원장치를 위한 중첩형 컨버터의 성능 비교)

  • Moon, Gun-Woo;Yoon, Suk-Ho;Kim, Yong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.12 no.3
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    • pp.37-44
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    • 1998
  • This paper compared to the operation performance and efficiency of an interleaved active clap ZVS forward converter and an interleaved ZVS half-bridge converter in distributed power system. The design for the current-mode control circuit of an interleaved active clamp ZVS forward converter is presented. To simplify the gate drive circuits, N-P MOSFETs coupled active clamp method is proposed. An efficiency about 90% for the 50∼100% load range is achieved.

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A Clamp Type Sensor for AC/DC Low Current Measurement (클램프 형 직교류 저 전류 측정 센서)

  • 박영태;유광민
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.12
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    • pp.1045-1053
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    • 2002
  • This paper describes characteristics of the developed current sensor by means of two identically wound magnetic cores forming a clamp like for measurement of a low DC, or AC current. This sensor consists of peak value detectors, a sensor of an electrically compensated current transformer type, a reference alternating voltage, Precision measuring circuits to measure the output signals of sensor with harmonics, and can be measured up to 2 A at DC, or AC current. The current sensor shows a measurement accuracy of less than 0.3% in the frequency range 40 Hz - 10 HBz. The resolution and sensitivity of the sensor were evaluated 0.1 mA and 10 mV/mA, respectively.