• 제목/요약/키워드: Circuit optimization

검색결과 479건 처리시간 0.028초

능동 전력 디커플링 회로의 커패시턴스 최적 설계에 관한 연구 (A Study on Optimal Design of Capacitance for Active Power Decoupling Circuits)

  • 백기호;박성민;정교범
    • 전력전자학회논문지
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    • 제24권3호
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    • pp.181-190
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    • 2019
  • Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.

호흡 검출 시스템을 위한 초소형 센서 인터페이스 회로 (Miniaturized Sensor Interface Circuit for Respiration Detection System)

  • Jo, Sung-Hun
    • 한국정보통신학회논문지
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    • 제25권8호
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    • pp.1130-1133
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    • 2021
  • In this paper, a miniaturized sensor interface circuit for the respiration detection system is proposed. Respiratory diagnosis is one of the main ways to predict various diseases. The proposed system consists of respiration detection sensor, temperature sensor, and interface circuits. Electrochemical type gas sensor using solid electrolytes is adopted for respiration detection. Proposed system performs sensing, amplification, analog-to-digital conversion, digital signal processing, and i2c communication. And also proposed system has a small form factor and low-cost characteristics through optimization and miniaturization of the circuit structure. Moreover, technique for sensor degradation compensation is introduced to obtain high accuracy. The size of proposed system is about 1.36 cm2.

인쇄회로기판 조립용 디스펜서의 경로계획 알고리즘 (A Path Planning Algorithm for Dispenser Machines in Printed Circuit Board Assembly System)

  • 송종석;박태형
    • 제어로봇시스템학회논문지
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    • 제6권6호
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    • pp.506-513
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    • 2000
  • This paper proposes a path planning algorithm for dispensers to increase the productivity in printed circuit board assembly lines. We analyze the assembly sequence of the dispenser, and formulate it as an integer programming problem. The mathematical formulation can accomodate multiple heads and different types of heads through extended cost matrix. The TSP algorithms are then applied to the formulated problem to find the near-optimal solution. Simulation results are presented to verify the usefulness of the proposed scheme.

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APPLICATION OF OBJECTIVE FUNCTIONS FOR THE OPTIMAL FILTER DESIGN FOR HVDC INVERTER

  • Oh, Sung-Chul;Chung, Gyo-Bum
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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    • pp.909-913
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    • 1998
  • Transient and static characteristics of HVDC inverter can be analyzed with various simulation tools. For the optimal filter design, various performance criteria are proposed. In this paper, performance index is calculated based on proposed per phase equivalent circuit. Voltage and harmonic and filter power loss are selected as criteria. Optimization procedure is performed to find optimal passive filter parameters. Dynamic characteristics is also analyzed with proposed equivalent circuit.

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Synthesis of Multiple Constant Multiplication Circuits Using GA with Chromosomes Composed of Stack Type Operators

  • Isoo, Yosuke;Toyoshima, Hisamichi
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 ITC-CSCC -2
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    • pp.623-626
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    • 2000
  • The purpose of this paper is to find an efficient solution for multiple constant multiplication (MCM) problem. Since the circuit structure can be represented as a directed acyclic graph, evolutionary computing is considered as an effective tool for optimization of circuit synthesis. In this paper, we propose a stack type operator as a chromosome element to synthesize a directed acyclic graph efficiently. This type of chromosome can represent a graph structure with a set of simple symbols and so we can employ the similar method to a conventional GA.

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다층신경망을 이용한 디지털회로의 효율적인 결함진단 (An Efficient Fault-diagnosis of Digital Circuits Using Multilayer Neural Networks)

  • 조용현;박용수
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.1033-1036
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    • 1999
  • This paper proposes an efficient fault diagnosis for digital circuits using multilayer neural networks. The efficient learning algorithm is also proposed for the multilayer neural network, which is combined the steepest descent for high-speed optimization and the dynamic tunneling for global optimization. The fault-diagnosis system using the multilayer neural network of the proposed algorithm has been applied to the parity generator circuit. The simulation results shows that the proposed system is higher convergence speed and rate, in comparision with system using the backpropagation algorithm based on the gradient descent.

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A Study on SFCL with IGBT Based DC Circuit Breaker in Electric Power Grid

  • Bae, SunHo;Kim, Hongrae;Park, Jung-Wook;Lee, Soo Hyoung
    • Journal of Electrical Engineering and Technology
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    • 제12권5호
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    • pp.1805-1811
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    • 2017
  • Recently, DC systems are considered as efficient electric power systems for renewable energy based clean power generators. This discloses several critical issues that are required to be considered before the installation of the DC systems. First of all, voltage/current switching stress, which is aggravated by large fault current, might damage DC circuit breakers. This problem can be simply solved by applying a superconducting fault current limiter (SFCL) as proposed in this study. It allows a simple use of insulated-gate bipolar transistors (IGBTs) as a DC circuit breaker. To evaluate the proposed resistive type SFCL application to the DC circuit breaker, a DC distribution system is composed of the practical line impedances from the real distribution system in Do-gok area, Korea. Also, to reflect the distributed generation (DG) effects, several DC-to-DC converters are applied. The locations and sizes of the DGs are optimally selected according to the results of previous studies on DG optimization. The performance of the resistive type SFCL applied DC circuit breaker is verified by a time-domain simulation based case study using the power systems computer aided design/electromagnetic transients including DC (PSCAD/ EMTDC(R)).

전압 표준용 RSFQ counter회로의 설계 (Circuit design of an RSFQ counter for voltage standard applications)

  • 남두우;김규태;김진영;강준희
    • 한국초전도저온공학회:학술대회논문집
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    • 한국초전도저온공학회 2003년도 추계학술대회 논문집
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    • pp.127-130
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    • 2003
  • An RSFQ (Rapid Single Flux Quantum) counter can be used as a frequency divider that was an essential part of a programmable voltage standard chip. The voltage standard chip is composed of two circuit parts, a counter and an antenna Analog signal of tens to hundreds ㎓ may be applied to a finline antenna part. This analog signal can be converted to the stream of SFQ voltage pulses by a DC/SFQ circuit. The number of voltage pulses can be reduced by 2n times when they pass through a counter that is composed of n T Flip-Flops (Toggle Flip-Flop). Such a counter can be used not only as a frequency divider, but also to build a programmable voltage standard chip. So, its application range can be telecommunication, high speed RAM, microprocessor, etc. In this work, we have used Xic, WRspice, and L-meter to design an RSFQ counter. After circuit optimization, we could obtain the bias current margins of the T Flip-Flop circuit to be above 31% Our RSFQ counter circuit designs were based on the 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology.

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유도가열 조리기기용 인버터 파라미터 최적화에 관한 연구 (A Study on the Parameter Optimization of Inverter for Induction Heating Cooking Appliance)

  • 강병관;이세민;박정욱
    • 전기학회논문지
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    • 제58권1호
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    • pp.77-85
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    • 2009
  • With the advent of power semiconductor switching devices, power electronics relating to high frequency electromagnetic eddy current based induction heating technology have become more suitable and acceptable. This paper presents high-frequency induction heating cooking appliance circuit based on the zero current switching-PWM single ended push-pull(ZCS-PWM SEPP) resonant inverter added AC-DC converter. This inverter uses pulse-width-modulation(PWM) control method with active auxiliary quasi-resonant lossless inductor snubbers and a switched capacitor. To improved the transient performance, the PI controller is applied for this system. For the systematic parameter optimization of the PI controller, the gradient-based optimization algorithm is applied. The performance of optimized parameters is evaluated using simulation and experimental test. These results show that the proposed systematic optimal tuning method improve the transient performances of this system.

Optimal Design of a Novel Permanent Magnetic Actuator using Evolutionary Strategy Algorithm and Kriging Meta-model

  • Hong, Seung-Ki;Ro, Jong-Suk;Jung, Hyun-Kyo
    • Journal of Electrical Engineering and Technology
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    • 제9권2호
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    • pp.471-477
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    • 2014
  • The novel permanent magnetic actuator (PMA) and its optimal design method were proposed in this paper. The proposed PMA is referred to as the separated permanent magnetic actuator (SPMA) and significantly superior in terms of its cost and performance level over a conventional PMA. The proposed optimal design method uses the evolutionary strategy algorithm (ESA), the kriging meta-model (KMM), and the multi-step optimization. The KMM can compensate the slow convergence of the ESA. The proposed multi-step optimization process, which separates the independent variables, can decrease time and increase the reliability for the optimal design result. Briefly, the optimization time and the poor reliability of the optimum are mitigated by the proposed optimization method.