• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.353-356
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• 2002

Due to the increased complexity and size of digital system and the need of the H/W-S/W co-design, C/C++ based system design methodology gains more Interests than ever in EDA field. This paper suggests the methodology in which handshake module corresponding to each basic statement of C is provided of the form of STG(Signal Transition Graph) and then, C statements is synthesized into asynchronous circuit through syntax-oriented translation. The 4-phase handshaking protocol is used for the communications between modules, and the modules are synthesized by the Petrify which is asynchronous logic synthesis CAD tool.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.397-400
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• 1999

As the result of enhancement of CAD, Design Automation and manufacturing technology, it's on the increasing complexity, integration ratio, data signals, and pin count to IC chips. This brings about difficulties of testing, and incresing test time. Now One of the most cost-consuming procedure as integration ratio increases is the testing step. In this paper, we propose a new method, “Efficient TP(test point) assignment algorithm” using “input grouping”, This is helpful method to reducing test length without losing fault coverage. Experimental results show that proposed method reduces test length remarkably and doesn't miss fault coverage, with low hardware overhead Increasing.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.6
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• pp.475-484
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• 1990

This paper proposes a method for the implementation of a power line communication equipment using power line synchronization in a direct-sequence spread spectrum communication system. In order to implement a network using a power line as a transmission channel we have investigated the utilization of direct-sequence speread spctrum which gives such advantages as robustness against narrow-band interference and noise, and realization of multiple access. In a power line, however, complexity of synchronization makes it difficult to realize a multiple access and cost down and system simplification. The proposed technique of power line synchronization makes it possible to get cost down and system size small, and the realization of multiple communication can be achieved by the addition of address setting circuit.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1606-1608
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• 2002

The triac is a bidirectional triode with blocking and conducting characteristics used in motor control or heater power control. This greatly simplifies the circuits required for the control of the full wave AC Power by reducing the number of power handling components and by reducing the size and complexity of the gate control circuit.[3] In this paper, We can understand measurement results of analysis which have been made on the electrical characteristics of triac with gate diffusion time for the gate area.

• Journal of Communications and Networks
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• v.9 no.4
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• pp.368-376
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• 2007

The large potential bandwidth available in wavelength-division multiplexed optical networks makes this technology of crucial importance for satisfying the ever increasing capacity requirements of the next-generation Internet. In this scenario, the routing and wavelength assignment(RWA) problem that concerns determining the optical paths and wavelengths to be used for connection establishment in a wavelength-routed network, is still one of the most important open issues. In this paper we propose a new online dynamic grooming-capable RWA heuristic scheme working on wavelength division multiplexing(WDM) networks as a multistage selection process. The proposed algorithm is transparent with respect to the presence of wavelength converters, achieves very low connection rejection ratios with minimal computational complexity and is appropriate for the modern multilayer optical circuit and wavelength switched networks with sparse wavelength conversion capability.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.248-253
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• 2014

Generally, power factor correction (PFC) techniques play an important role in the power supply technology. Many new circuit topologies and control strategies for PFC have been proposed. Among them, the brideless PFC (BPFC) reduces the number of switching devices and the losses and improves the power density as well. Moreover, by implementing the improved topology in the discontinous conduction mode (DCM) it ensures almost unity power factor in a simple and effective manner. In the DCM operation gives additional advantages such as zero-current turn-on in the power switches, zero-current turn-off in the output diode and reduces the complexity of the control circuitry. In this paper, a new control strategy for the BPFC is proposed. Also, the performance of the proposed system is demonstrated through experiments.

• Journal of Korean Institute of Industrial Engineers
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• v.22 no.3
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• pp.399-412
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• 1996

With respect to the effects of types of knowledge on human diagnostic performance, the results of several experiments claimed that training with procedural knowledge is more effective than training with principle knowledge. However, more useful results would be attained by investigating when and how the principles of system dynamics is valuable for diagnosis. Accordingly, we conducted an experiment to reevaluate the value of principle knowledge in two problem situations. A simulator system, named DLD, to diagnose an electronic device was created. It is a context-free digital logic circuit which includes forty-one gates of three basic types. The experiment investigated the effects of principle knowledge over common procedural knowledge. The experimental results showed that the effects of principle knowledge is dependent on the complexity of diagnostic situations. This adds up on experimental evidence against the presumed ineffectiveness of principle knowledge and forward reasoning in fault diagnosis. The results also suggest the source of the usefulness of principle knowledge.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.1
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• pp.20-27
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• 2010

Modeling is essential to simulate the operation of integrated circuit (IC) before its fabrication. Seeing a large number of Metal-Oxide-Silicon Field-Effect-Transistor (MOSFET) models available, it has become important to understand them and compare them for their pros and cons. The task becomes equally difficult when the complexity of these models becomes very high. The paper reviews the mainstream models with their physical relevance and their comparisons. Major short-channel and quantum effects in the models are outlined. Emphasis is set upon the latest compact models like BSIM, MOS Models 9/11, EKV, SP etc.

• IEMEK Journal of Embedded Systems and Applications
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• v.5 no.1
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• pp.18-22
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• 2010

In real-time embedded systems, the responsibility is the most important thing because it is related to human life. Context switching is a part of which can slow down the responsibility. We therefore should minimize the amount of state that needs to be saved during context switching. In this paper, we introduce a new architecture (Register Farm) for context switching which can exchange two contexts in one cycle time. Although it might increase the cost of MCU design and the complexity of circuit, it cannot miss any interrupt during context switching. Consequently, Register Farm architecture can make embedded systems spread out in human life because it can increase reliability and responsibility in real time embedded systems.

• Journal of Power Electronics
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• v.4 no.4
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• pp.197-204
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• 2004

Two-stage Power-Factor-Correction (PFC) converters are the most common circuits for drawing sinusoidal and in phase current waveforms from an ac source with a good regulated output voltage. The first stage is a boost PFC converter with average-current-mode control for achieving the near-unity power factor and the second stage is a forward converter with voltage-mode control to regulate the output voltage. Stability analysis and design methods of two-stage PFC converters have previously been discussed using linear models. Recently, new nonlinear phenomena have been detected in pre-regulator boost PFC circuits and a new nonlinear model has been proposed for pre-regulated PFC converters. Therefore, investigation of two-stage PFC converters from the nonlinear viewpoint becomes important because the second stage DC/DC converter adds more complexity to the circuit. So, this paper introduces a study of the stability of two-stage PFC converters. A novel nonlinear model of two-stage PFC converters is proposed. Then, a stability analysis is made based upon this nonlinear model. The high correspondence between the simulated and experimental results confirms our analysis.