• 한국정밀공학회지
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• 제32권11호
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• pp.969-976
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• 2015

In the present study, a numerical investigation of an insert injection molding process was carried out for the development of thermoplastic microfluidic chip plates with metal electrodes. Insert injection molding technology enables efficient realization of a plastic-metal hybrid structure and various efforts have been undertaken to produce novel components in several application fields. The microfluidic chip with metal inserts was proposed as a representative example and its molding process was analyzed. The important characteristics of the filling stage, such as the effects of filling time and thickness of the part cavity, were characterized. Furthermore, the detailed distributions of pressure and temperature at the end of the filling stage were investigated, revealing the significance of metal insert temperature.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 Proceedings of 5th International Joint Symposium on Microeletronics and Packaging
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• pp.35-40
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• 2000

MCM technology languished troughout most of the 1990's due to high costs resulting from low yields and issues with known god die. During the last five years of the decade new developments in chip scale packages and high density, build up multi-layer printed wiring boards created new opportunities to design and produce ultra miniaturized modules using conventional surface mount manufacturing capabilities. Focus on the miniaturization of substrate based packages such as ball grid arrays (BGAs) resulted in chip scale packages (CSPs) offering many of the benefits of flip chip along with the handling, testing, manufacturing and reliability capabilities of packaged deviced. New developments in the PWB industry sought to reduce the size, weight, thickness and cost of high density interconnect (HDI) substrates. Shrinking geometries of vias and new constructions significantly increased the interconnect density available for MCM-L applications. This paper describes the most promising CSP and HDI technologies for portable products, high performance computing and dense multi-chip modules.

• Journal of Welding and Joining
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• 제20권2호
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• pp.90-94
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• 2002

FC-BGA has advantages over other interconnection methods including high I/O counts, better electrical performance, high throughput, and low profile. But, FC-BGA has a lot of reliability issues. The 2nd level solder joint reliability of the FC-BGA with large chip on laminate substrate was studied in this paper. The purpose of this study is to discuss solder joint failures of 2nd level thermal cycling test. This work has been done to understand the influence of the structure of package, the properties of underfill, the properties and thickness of bismaleimide tiazine substrate and the temperature range of thermal cycling on 2nd level solder joint reliability. The increase of bismaleimide tiazine substrate thickness applied to low modulus underfill was improve of solder joint reliability. The resistance of solder ball fatigue was increased solder ball size in the solder joints of FC-BGA.

• Journal of Welding and Joining
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• 제16권4호
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• pp.92-97
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• 1998

Because of the low melting temperature of solder, each temperature cycle initiates an irrecoverable creep deformation at the solder interconnection which connects the package body with the PCB. The crack starts and propagates from the position where the creep deformation is maximized. This work has tried to compare and analyze the thermal fatigue life of solder interconnection which is affected by the lead material, the size of die pad, chip thickness, and interface delamination of 48-Pin TSOP under the temperature cycle ($0^{\circ}C$~1$25^{\circ}C$). The crack initiation position and thermal fatigue life which are calculated by using FEA method are well matched with the results of experiments. The thermal Fatigue life of copper lead frame is extended around 3.6 times longer than that of alloy 42 lead frame. It is maximized when the chip size is matched with the length of the lead. It tends to be extended as the thickness of chip got thinner. As the interfacial delamination between die pad and EMC is increased, the thermal fatigue life tends to decrease in the beginning of delamination, and increase after the delamination grew after 45% of the length of die pad.

• 한국정밀공학회지
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• 제20권5호
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• pp.218-224
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• 2003

This paper describes a novel MEMS integration technique on a CMOS chip. MEMS integration on CMOS circuit has many advantages in view of manufacturing cost and reliability. The surface topography of a CMOS chip from a commercial foundry has 0.9 ${\mu}{\textrm}{m}$ bumps due to the conformal coating on aluminum interconnect patterns, which are used for addressing each MEMS element individually. Therefore, it is necessary to achieve a flat mirror-like CMOS chip fer the microelectromechanical system (MEMS) such as micro mirror array. Such CMOS chip needs an additional thickness of the dielectric passivation layer to ease the subsequent planarization process. To overcome a temperature limit from the aluminum thermal degradation, this study uses RF sputtering of silicon nitride at low temperature and then polishes the CMOS chip together with the surrounding dummy pieces to define a polishing plane. Planarization reduces 0.9 ${\mu}{\textrm}{m}$ of the bumps to less than 25 nm.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2002년도 추계기술심포지움논문집
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• pp.21-26
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• 2002

Solder flip chip bumping and subsequent coining processes on PCB were investigated to solve the warpage problem of organic substrates for high pin count flip chip assembly by providing good co-planarity. Coining of solder bumps on PCB has been successfully demonstrated using a modified tension/compression tester with height, coining rate and coining temperature variables. It was observed that applied loads as a function of coined height showed three stages as coining deformation : (1) elastic deformation at early stage, (2) linear increase of applied load, and (3) rapid increase of applied load. In order to reduce applied loads for coining solder bumps on PCB, effects of coining process parameters were investigated. Coining loads for solder bump deformation strongly depended on coining rates and coining temperatures. As coining rates decreased and process temperature increased, coining loads decreased. Among the effect of two factors on coining loads, it was found that process temperature had more significant effect to reduce applied coining loads during the coining process. Lower coining loads were needed to prevent substrate damages such as micro-via failure and build-up dielectric layer thickness change during applying loads. For flip chip assembly, 97Pb/Sn flip chip bumped devices were successfully assembled on organic substrates with 37Pb/Sn coined flip chip bumps.

• 한국정밀공학회지
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• 제23권3호
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• pp.39-46
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• 2006

In this work a dynamic cutting force model in ball end milling of inclined surface is introduced. To represent the complex cutting geometry in ball end milling of inclined surface, workpiece is modeled with Z-map method and cutting edges are divided into finite cutting edge elements. As tool rotates and vibrates, a finite cutting edge element makes two triangular sub-patches. Using the number of nodes in workpiece which are in the interior of sub-patches, instant average uncut chip thickness is derived. Instant dynamic cutting forces are computed with the chip thickness and cutting coefficients. The deformation of cutting tool induced by cutting farces is also computed. With iterative computation of these procedures, a dynamic cutting force model is generated. The model is verified with several experiments.

• 한국생산제조학회지
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• 제22권6호
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• pp.1003-1009
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• 2013

This paper presents a simple procedure to obtain the instantaneous cutting force constants needed to predict milling forces. Cutting force data measured in a series of slot milling tests were used to determine the cutting force constants at different feed rates. The values of the cutting force constants were determined directly at the tool rotation angle that maximized the uncut chip thickness. Then, the instantaneous cutting force constant was obtained as a function of the instantaneous uncut chip thickness. This approach can greatly enhance the accuracy of the mechanistic cutting force model for end milling. In addition, the influences of several cutting parameters on the cutting forces, such as the tool helix angle and axial depth of cut, were discussed.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1995년도 추계학술대회 논문집
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• pp.1059-1062
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• 1995

In cutting system, relative displacement between rool and workpiece is very important. Even though there have been so many works for modeling cutting process of end-milling, most of them have considered only one displacement of either tool or workpiece instead of both. In this paper, the relative displacement between tool and workpiece is considered for modeling cutting process of end-milling using simple experimental modal analysis and cutting force simulation program is developed. In cutting force model, instantaneous uncut chip thickness model is used and Runge-Kutta method is used for the simulation of time varying cutting system.

• 한국기계가공학회지
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• 제11권3호
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• pp.19-23
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• 2012

Glassy carbon is widely used for high temperature melting process such as quartz due to its thermal stability. For utilizing Classy Carbon to glass mold press(GMP) optical lens, brittleness of Glassy Carbon is main obstacle of ultraprecision machining. Thus authors investigated ductile machining of Glassy Carbon adopting turning and grinding process respectively. From the experiments, ultraprecision turning surfaces resulted brittle crack in all machining conditions and ultraprecision grinding surfaces showed semi-ductile mode in small undeformed chip thickness conditions.