• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.2
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• pp.126-129
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• 2021

We fabricated plate typed shunt resistors composed of carbon nanotube (CNT) and metal alloy for measuring DC current. CNT plates were prepared from dispersed CNT/Urethane solution by squeezing method. Cu/Ni alloys were prepared from composition-designed alloy wires for adjusting the temperature coefficient of resistance (TCR) by pressing them. As well, we fabricated a hybrid resistor by squeezing the CNT/Urethane solution on the metal alloy plate directly. In order to confirm the composition ratio of the Cu/Ni alloy, we used an energy-dispersed X-ray spectroscopy (EDX). Cross-section and surface morphology were analyzed by using a scanning electron microscopy (SEM). Finally, we measured the initial resistance of 2.35 Ω at 25℃ for the CNT paper resistor, 7.56 mΩ for the alloy resistor, and 7.38 mΩ for the hybrid resistor. The TCR was also measured to be -778.72 ppm/℃ at the temperature range between 25℃ to 125℃ for the CNT paper resistor, 824.06 ppm/℃ for the alloy resistor, and 17.61 ppm/℃ for the hybrid resistor. Some of the hybrid resistors showed a near-zero TCR of 1.38, -2.77, 2.66, and 5.49 ppm/℃, which might be the world best-value ever reported. Consequently, we could expect an error-free measurement of the DC current using this resistor.

• BioChip Journal
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• v.12 no.4
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• pp.332-339
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• 2018

The future neuro-prosthetic devices would be required spikes data monitoring through sub-nanoscale transistors that enables to neuroscientists and clinicals for scalable, wireless and implantable applications. This research investigates the spikes monitoring through integrated CNT front-end amplifier for neuro-prosthetic diagnosis. The proposed carbon nanotube-based architecture consists of front-end amplifier (FEA), integrate fire neuron and pseudo resistor technique that observed high electrical performance through neural activity. A pseudo resistor technique ensures large input impedance for integrated FEA by compensating the input leakage current. While carbon nanotube based FEA provides low-voltage operation with directly impacts on the power consumption and also give detector size that demonstrates fidelity of the neural signals. The observed neural activity shows amplitude of spiking in terms of action potential up to $80{\mu}V$ while local field potentials up to 40 mV by using proposed architecture. This fully integrated architecture is implemented in Analog cadence virtuoso using design kit of CNT process. The fabricated chip consumes less power consumption of $2{\mu}W$ under the supply voltage of 0.7 V. The experimental and simulated results of the integrated FEA achieves $60G{\Omega}$ of input impedance and input referred noise of $8.5nv/{\sqrt{Hz}}$ over the wide bandwidth. Moreover, measured gain of the amplifier achieves 75 dB midband from range of 1 KHz to 35 KHz. The proposed research provides refreshing neural recording data through nanotube integrated circuit and which could be beneficial for the next generation neuroscientists.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.1
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• pp.1-5
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• 2000

Co-fired resistors for high frequency MCM-C (Multi Chip Module-Cofired) were fabricated and measured their RF properties from DC to 6 GHz. LTCC (Low Temperature Co-fired Ceramics) substrates with 8 layers were used as the substrates. Resisters and electrodes were printed on the 7th layer and connected to the top layer by via holes. Deviation from DC resistance of the resistors was resulted from the resister pastes, resistor size, and via length. From the experimental results, the suitable equivalent circuit model was adopted with resistor, transmission line, capacitor, and inductor. The characteristic impedance $Z_{o}$ of the transmission line from the equivalent circuit can explain the RF behavior of the buried resistor according to the structural variation.

• Journal of the Korea Society of Computer and Information
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• v.5 no.3
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• pp.76-83
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• 2000

The continuous time signal system by development of CMOS technology have been receiving consideration attention. In this paper, Low pass filter using new CMOS floating resistor have been designed with cut off frequency for speech signal Processing. Especially a new floating resistor consisting entirely of CMOS devices in saturation has been developed. Linearity within $\pm$0.04% is achieved through nonlinearity via current mirrors over an applied range of $\pm$1V The frequency response exceeds 10MHz, and the resistors are expected to be useful in implementing integrated circuit active RC filters. The low pass filter designed using this method has simpler structure than switched capacitofilter. So reduce the chip area. The characteristics of the designed low pass filter using this method are simulated by pspice program.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.4
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• pp.275-281
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• 2003

A new neural oscillator has been designed and fabricated in an 0.5 ${\mu}{\textrm}{m}$ double poly CMOS technology. The proposed neural oscillator consists of a nonlinear variable resistor with negative resistance as well as simple transconductors and capacitors. The variable negative resistor which is used as a input stage of the oscillator consists of a positive feedback transconductors and a bump circuit with Gaussian-like I-V curve. The proposed neural oscillator has designed in integrated circuit with SPICE simulations. Simulations of a network of 4 oscillators which are connected with excitatory and inhibitory synapses demonstrate cooperative computation. Measurements of the fabricated oscillator chip with a $\pm$ 2.5 V power supply is shown and compared with the simulated results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.3
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• pp.198-206
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• 2011

This paper presents a new programmable compensation circuit (PCC) for a System-on-Chip (SoC). The PCC is integrated with $0.18-{\mu}m$ BiCMOS SiGe technology. It consists of RF Design-for-Testability (DFT) circuit, Resistor Array Bank (RAB) and digital signal processor (DSP). To verify performance of the PCC we built a 5-GHz low noise amplifier (LNA) with an on-chip RAB using the same technology. Proposed circuit helps it to provide DC output voltages, hence, making the RF system chain automatic. It automatically adjusts performance of an LNA with the processor in the SoC when it goes out of the normal range of operation. The PCC also compensates abnormal operation due to the unusual PVT (Process, Voltage and Thermal) variations in RF circuits.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.3
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• pp.1-6
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• 2017

As the performance and density of IC devices increase, especially the clock frequency increases, power grid network integrity problems become more challenging. To resolve these power integrity problems, the use of passive devices such as resistor, inductor, and capacitor is very important. To manage the power integrity with little noise or ripple, decoupling capacitors are essential in electronic packaging. The decoupling capacitors are classified into voltage regulator capacitor, board capacitor, package capacitor, and on-chip capacitor. For next generation packaging technologies such as 3D packaging or wafer level packaging on-chip MIM decoupling capacitor is the key element for power distribution and delivery management. This paper reviews the use and necessity of on-chip decoupling capacitor.

• Journal of the Korea Safety Management & Science
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• v.20 no.3
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• pp.21-26
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• 2018

This paper describes result of a study on safety against a fire of charging cable for mobile phone for vehicle. Combustion on the USB cable in the car was happened while driving. Gas coming from the burning USB cable could be a reason which can make a secondary car accident since the driver also can be embarrassed while driving. In order to prevent a secondary car accident connected on the road, to research a reason why USB cable can emit gas and be burned in charging. We did simulation test with abnormal fault condition for the electronic component on the board in the USB cable. So we get the result from abnormal fault condition simulation test, for instance, shorted test for output terminal of 8 pin switch, shorted test for chip resistor after thermal aging in the condition $25^{\circ}C$, 93 % RH during 48 hours. To analysis the result of all test, Combustion on the USB cable was not the 8 pin but other electrical component such as a chip resistor. Therefore we guess that the reason for USB cable combustion in charging in a car was not 8 pin and a LED but another defective component.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.8
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• pp.1322-1328
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• 2000

This paper presents the characteristics of complex antenna factors of monopole antenna for the measuring time-domain fields above the ground plane. The method of moments with Galerkin's procedure is used to determine the current distribution of the antenna. The monopole antenna with chip resistor is discussed to reduce the reflection at low frequencies. Numerical results show that the magnitude of the complex antenna factor for the monopole with chip resistor is 5.6 dB as large as that of the conventional monopole antenna. The characteristics of the modified complex antenna factor to use the antenna factor are also treated at low frequencies. To verify the theoretical analysis, experimental results are compared with theoretical ones.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.4
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• pp.203-211
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• 2013

UHF RFID tag designers usually ndde the chip impedance and read power sensitivity value obtained when a tag chip is mounted on a chip pad. The chip impedance, however, is not able to be supplied by chip manufacturer, since the chip impedance is varied according to tag designs and fabrication processes. Instead, the chip makers mostly supply the chip impedances measured on the bare dies. This study proposes a chip impedance and read power sensitivity evaluation method which requires a few simple auxiliary and some RF measuring equipment. As it is impractical to measure the chip impedance directly at mounted chip terminals, some form test fixture is employed and the effect of the fixture is modeled and de-embeded to determine the chip impedance and the read power sensitivity. Validity and accuracy of the proposed de-embed method are examined by using commercial RFID tag chips as well as a capacitor and a resistor the value of which are known.