• Title/Summary/Keyword: Chip Impedance

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A $120-dB{\Omega}$ 8-Gb/s CMOS Optical Receiver Using Analog Adaptive Equalizer (아날로그 어댑티브 이퀄라이저를 이용한 $120-dB{\Omega}$ 8-Gb/s CMOS 광 수신기)

  • Lee, Dong-Myung;Choi, Boo-Young;Han, Jung-Won;Han, Gun-Hee;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.119-124
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    • 2008
  • Transimpedance amplifier(TIA) is the most significant element to determine the performance of the optical receiver, and thus the TIA must satisfy tile design requirements of high gain and wide bandwidth. In f)is paper, we propose a novel single chip optical receiver that exploits an analog adaptive equalizer and a limiting amplifier to enhance the gain and bandwidth performance, respectively. The proposed optical receiver is designed by using a $0.13{\mu}m$ CMOS process and its post-layout simulations show $120dB{\Omgea}$ transimpedance gain and 5.88GHz bandwidth. The chip core occupies the area of $0.088mm^2$, due to utilizing the negative impedance converter circuit rather than using on-chip passive inductors.

An Integrated Approach of CNT Front-end Amplifier towards Spikes Monitoring for Neuro-prosthetic Diagnosis

  • Kumar, Sandeep;Kim, Byeong-Soo;Song, Hanjung
    • BioChip Journal
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    • v.12 no.4
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    • pp.332-339
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    • 2018
  • The future neuro-prosthetic devices would be required spikes data monitoring through sub-nanoscale transistors that enables to neuroscientists and clinicals for scalable, wireless and implantable applications. This research investigates the spikes monitoring through integrated CNT front-end amplifier for neuro-prosthetic diagnosis. The proposed carbon nanotube-based architecture consists of front-end amplifier (FEA), integrate fire neuron and pseudo resistor technique that observed high electrical performance through neural activity. A pseudo resistor technique ensures large input impedance for integrated FEA by compensating the input leakage current. While carbon nanotube based FEA provides low-voltage operation with directly impacts on the power consumption and also give detector size that demonstrates fidelity of the neural signals. The observed neural activity shows amplitude of spiking in terms of action potential up to $80{\mu}V$ while local field potentials up to 40 mV by using proposed architecture. This fully integrated architecture is implemented in Analog cadence virtuoso using design kit of CNT process. The fabricated chip consumes less power consumption of $2{\mu}W$ under the supply voltage of 0.7 V. The experimental and simulated results of the integrated FEA achieves $60G{\Omega}$ of input impedance and input referred noise of $8.5nv/{\sqrt{Hz}}$ over the wide bandwidth. Moreover, measured gain of the amplifier achieves 75 dB midband from range of 1 KHz to 35 KHz. The proposed research provides refreshing neural recording data through nanotube integrated circuit and which could be beneficial for the next generation neuroscientists.

A New Automatic Compensation Network for System-on-Chip Transceivers

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • ETRI Journal
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    • v.29 no.3
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    • pp.371-380
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    • 2007
  • This paper proposes a new automatic compensation network (ACN) for a system-on-chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on-chip ACN using 0.18 ${\mu}m$ SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design-for-testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.

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The Optimum Structure Design of 1005 RF Chip Inductors for GHz Band (GHz 대역을 위한 1005 RF 칩 인덕터의 최적 구조 설계)

  • Kim, Jae-Wook;Ryu, Chang-Keun
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.785-788
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    • 2005
  • In this study, micro-scale, high-performance, solenoid-type RF chip inductors were investigated. The size of the RF chip inductors fabricated in this work was $1.0{\times}0.5{\times}0.5mm^3$ The material and shape of the core were 96% $Al_2O_3$ and I-type. The material and number of turn of coil were copper (Cu) and 6. The diameter ($40{\mu}m$) of coil and length (0.35mm) of solenoid were determined by a Maxwell three-dimensional field simulator to maximize the performance of the inductors. High frequency characteristics of the inductance (L) and quality-factor (Q) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). The inductors developed have inductances of 10.8nH and quality factors of 25.2 at 250MHz, and show results comparable to those measured for the inductors prepared by CoilCraftTm that is one of the best chip inductor company in the world. The simulated data predicted the high-frequency data of the Land Q of the inductors developed well.

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Design of UHF RFID Tag Considering Chip Characteristic (칩 특성을 고려한 UHF RFID 태그 설계)

  • Lee, Hong-Joo;Hwang, Gun-Yong;Lee, Eung-Joo
    • Journal of Korea Multimedia Society
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    • v.14 no.2
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    • pp.194-200
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    • 2011
  • Recently, RFID(Radio Frequency IDentification) market spread in industry region is entering a phase of stagnation due to cost issue. RFID tag inlay cost has become relatively more expensive due to the recent decrease in chip price. Therefore, a simple and rapid design technique for RFID tag has yet to be implemented to achieve low cost. This paper presents a design technique considering chip impedance for antenna design for improved accuracy and computation time. As a result, it is confirmed that analysis error for resonance ranges within 20MHz and readable range error falls within 1.5m.

Development of High-Performance Ultra-small Size RF Chip Inductors (고성능의 초소형 RF 칩 인덕터 개발)

  • 윤의중;천채일
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.3
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    • pp.340-347
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    • 2004
  • Ultra-small size, high-performance, solenoid-type RF chip inductors utilizing low-loss A1$_2$O$_3$ core materials were investigated. The dimensions of the RF chip inductors fabricated were 1.0mm${\times}$0.5mm${\times}$0.5mm and copper coils were used. The materials (96% A1$_2$O$_3$) and shape (I-type) of the core, the diameters (40${\mu}{\textrm}{m}$) and position (middle) of the coil, and the lengths (0.35mm) of solenoid were determined by a high-frequency structure simulator (HFSS) to maximize the performance of the inductors. The high-frequency characteristics of the inductance (L) and quality-factor (Q) of the developed inductors were measured using a RF impedance/material analyzer (E4991A with E16197A test fixture). The developed inductors exhibit an inductance of 11 to 11.3nH and a qualify factor of 22.3 to 65.7 over the frequency ranges of 250 MHz to 1.7 GHz, and show results comparable to those measured for the inductors prepared by Coilcraft$^{TM}$. The simulated data described the high-frequency data of the L and Q of the fabricated inductors well.

A Study for Optimum Design and Fabrication of Microscale Solenoid RF Chip Inductors (극소형 솔레노이드 RF 칩 인덕터의 설계 및 제작에 대한 연구)

  • 윤의중;정영창
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.52 no.11
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    • pp.501-507
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    • 2003
  • In this study, microscale, high-performance, solenoid-type RF chip inductors were investigated. The size of the RF chip inductors fabricated in this work was 1.0${\times}$0.5${\times}$0.5㎣. 96% $Al_2$ $O_3$and I-type were used as the material and shape of the core, respectively. The copper (Cu) wire with 6 turns was employed as the coils. The diameter (40${\mu}{\textrm}{m}$) and position (middle) of the coil and the length (0.35mm) of solenoid were determined by a high-frequency structure simulator (HFSS) to maximize the performance of the inductors. High frequency characteristics of the inductance (L) and quality-factor (Q) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). The inductors developed have inductances of 10.8nH and quality factors of 25.2 to 50 over the frequency ranges of 250MHz to l GHz, and show results comparable to those measured for the inductors prepared by CoilCraf $t^{Tm}$ . The simulated data predicted the high-frequency data of the L and Q of the inductors developed well.l.

1.8-GHz Six-Port-Based Impedance Modulator Using CMOS Technology (CMOS 공정을 이용한 1.8 GHz 6-포트 기반의 임피던스 변조기)

  • Kim, Jinhyun;Kim, Jeong-Geun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.5
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    • pp.383-388
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    • 2018
  • This paper presents a 1.8 GHz six-port-based impedance modulator using CMOS technology, which can select an arbitrary load impedance with switch control. The proposed 1.8-GHz impedance modulator comprises a Wilkinson power divider, three quadrature hybrid couplers, and four SP3T switches for each load impedance selection. The measured insertion loss of -13 dB and the input/output return losses of >10 dB are achieved in the range of 1.4~2.2 GHz. The low drop output regulator for a stable 3.3 V DC power and the serial peripheral interface(SPI) for an easy digital control are integrated. The chip size, including the pads, is $1.7{\times}1.8mm^2$.

Basic Study on RF Characteristics of Thin-Film Transmission Line Employing ML/CPW Composite Structure on Silicon Substrate and Its Application to a Highly Miniaturized Impedance Transformer

  • Jeong, Jang-Hyeon;Son, Ki-Jun;Yun, Young
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.1
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    • pp.10-15
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    • 2015
  • A thin-film transmission line (TFTL) employing a microstrip line/coplanar waveguide (ML/CPW) was fabricated on a silicon substrate for application to a miniaturized on-chip RF component, and the RF characteristics of the device with the proposed structure were investigated. The TFTL employing a ML/CPW composite structure exhibited a shorter wavelength than that of a conventional coplanar waveguide and that of a thin-film microstrip line. When the TFTL with the proposed structure was fabricated to have a length of ${\lambda}/8$, it showed a loss of less than 1.12 dB at up to 30 GHz. The improvement in the periodic capacitance of the TFTL caused for the propagation constant, ${\beta}$, and the effective permittivity, ${\varepsilon}_{eff}$, to have values higher than those of a device with only a conventional coplanar waveguide and a thin film microstrip line. The TFTL with the proposed structure showed a ${\beta}$ of 0.53~2.96 rad/mm and an ${\varepsilon}_{eff}$ of 22.3~25.3 when operating from 5 to 30 GHz. A highly miniaturized impedance transformer was fabricated on a silicon substrate using the proposed TFTL for application to a low-impedance transformation for broadband. The size of the impedance transformer was 0.01 mm2, which is only 1.04% of the size of a transformer fabricated using a conventional coplanar waveguide on a silicon substrate. The impedance transformer showed excellent RF performance for broadband.

Design of filters with double coupled line for PCS (이중결합선로를 이용한 PCS용 여파기의 설계)

  • 이창화;구본희김명수이상석
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.387-390
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    • 1998
  • We propose comb-line filter using SIR(Stepped Impedance Resonator) with two transmission line. The coupling structure of the filter is double coupled line where two coupled lines are linked with cascade. We find out the inverter function of the filter. using even and odd mode impedance. The merits of the filter are that first, we can design transmission zero point at any frequency that we wanted without using lumped elements : chip capacitors and inductors. Second, we can design small size filters. To validate the inverter function of the filter with double coupled line we designed and fabricated two-pole band pass filter with the proposed filter structure.

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