• Title/Summary/Keyword: Charge pumping

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The Comparison of Activation Protocols for PEMFC MEA with PtCo/C Catalyst (PtCo/C 촉매를 사용한 PEMFC MEA의 활성화 프로토콜 비교)

  • GISEONG LEE;HYEON SEUNG JUNG;JINHO HYUN;CHANHO PAK
    • Transactions of the Korean hydrogen and new energy society
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    • v.34 no.2
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    • pp.178-186
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    • 2023
  • Three activation methods (constant voltage, current cycling, and hydrogen pumping) were applied to investigate the effects on the performance of the membrane electrode assembly (MEA) loaded with PtCo/C catalyst. The current cycling protocol took the shortest time to activate the MEA, while the performance after activation was the worst among the all activation methods. The constant voltage method took a moderate activation time and exhibited the best performance after activation. The hydrogen pumping protocol took the longest time to activate the MEA with moderate performance after activation. According to the distribution of relaxation time analysis, the improved performance after the activation mainly comes from the decrease of charge transfer resistance rather than the ionic resistance in the cathode catalyst layer, which suggests that the existence of water on the electrode is the key factor for activation.

A DC-DC Converter Design for OLED Display Module (OLED Display Module용 DC-DC 변환기 설계)

  • Lee, Tae-Yeong;Park, Jeong-Hun;Kim, Jeong-Hoon;Kim, Tae-Hoon;Vu, Cao Tuan;Kim, Jeong-Ho;Ban, Hyeong-Jin;Yang, Gweon;Kim, Hyoung-Gon;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.3
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    • pp.517-526
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    • 2008
  • A one-chip DC-DC converter circuit for OLED(Organic Light-Emitting Diode) display module of automotive clusters is newly proposed. OLED panel driving voltage circuit, which is a charge-pump type, has improved characteristics in miniaturization, low cost and EMI(Electro-Magnetic Interference) compared with DC-DC converter of PWM(Pulse Width Modulator) type. By using bulk-potential biasing circuit, charge loss due to parasitic PNP BJT formed in charge pumping, is prevented. In addition, the current dissipation in start-up circuit of band-gap reference voltage generator is reduced by 42% and the layout area of ring oscillator is reduced by using a logic voltage VLP in ring oscillator circuit using VDD supply voltage. The driving current of VDD, OLED driving voltage, is over 40mA, which is required in OLED panels. The test chip is being manufactured using $0.25{\mu}m$ high-voltage process and the layout area is $477{\mu}m{\times}653{\mu}m$.

An experimental study on the effects of an inserted coil on flow patterns and heat transport performances for a horizontal rotating heat pipe (수평 회전 히트파이프에서 내부 삽입 코일이 유동 형태 및 열전달 성능에 미치는 영향에 대한 실험 연구)

  • 이진성;김철주;김선주;문석환
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.10 no.6
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    • pp.763-772
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    • 1998
  • The effects of an inserted coil on flow patterns and heat transport performance for a horizontal rotating heat pipe have been studied experimentally. Especially, the present study is to see an internally inserted helical coil inside a RHP would lead to the same kind of results as internal fins. Visualization test conducted for an acryl tube, charged water with at a volumetric rate of 20%. When the flow kept pool regime at a low RPM(less than 1,000 RPM), the movement of coil forced the water to flow in axial direction. But this pumping effect of coil disappeared, when the pool regime changed to annular one which could be created by increasing RPM. The pumping effects for RHP with an inserted coil resulted enhancement both in condensation heat transfer coefficient and heat transport limitation, as obtained in case of using internal fins. But all these effects became negligible in the range of higher RPM(above 1,000∼1,200) with the transition of flow regime to annular flow.

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Pumping-up Current Characteristics of Linear Type Magnetic Flux Pump

  • Chung, Yoondo;Muta, Itsuya;Hoshino, Tsutomu;Nakamura, Taketsune;Ko, Taekuk
    • Progress in Superconductivity and Cryogenics
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    • v.6 no.2
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    • pp.29-34
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    • 2004
  • The linear type flux pump aims to compensate a little bit decremental persistent current of the HTS magnet in NMR and MRI spectrometers. The flux pump mainly consists of DC bias coil, 3-phase AC coil and Nb foil. The persistent current in closed superconductive circuit can be easily adjusted by the 3-phase AC current, its frequency and the DC bias current. In the experiment, it has been investigated that the flux pump can effectively charge the current in the load coil of 543 mH for various frequencies in 18 minutes under the DC bias of 10 A and the AC of 5 $A_{rms}$. The maximum magnitudes of pumping current and load magnet voltage are 0.72 A/min and 20 ㎷, respectively. Based on simulation results by the FEM are proved to nearly agree with experimental ones.

An Experimental Study on the Effects of ...an Inserted Coil on Flow Patterns pd. Beat Transport Performances for a Horizontal Rotating Heat Pipe

  • Lee, Jin-Sung;Kim, Chul-Ju;Kim, Bong-Hun
    • International Journal of Air-Conditioning and Refrigeration
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    • v.8 no.1
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    • pp.50-61
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    • 2000
  • The effects of an inserted coil on flow . patterns and heat transfer performance for a horizontal rotating heat pipe have been studied experimentally. Especially, the present study is to see an internally inserted helical coil inside a RHP would lead to the same kind of results as internal fins. Visualization test conducted for an acryl tube, charged water with at a volumetric rate of 20%. When the flow kept pool regime at a low rpm(less than 1,000rpm), the movement of coil forced the water to flow in axial direction. But this pumping effect of coil disappeared, when the pool regime changed to annular one which could be created by increasing rpm. The pumping effects for RHP with an inserted coil resulted in the enhancement in both condensation heat transfer coefficient and heat transport limitation, as obtained in case of using internal fins. But all these effects became negligible in the range of higher rpm(above 1,000-1,200) with the transition of flow regime to annular flow.

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An Energy Efficient $V_{pp}$ Generator using a Variable Pumping Clock Frequency for Mobile DRAM (가변 펌핑 클록 주파수를 이용한 모바일 D램용 고효율 승압 전압 발생기)

  • Kim, Kyu-Young;Lee, Doo-Chan;Park, Jong-Sun;Kim, Soo-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.6
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    • pp.13-21
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    • 2010
  • A energy efficient $V_{pp}$ generator using a variable pumping frequency for mobile DRAM is presented in this paper. The proposed $V_{pp}$ generator exploits 3 stages of a cross-coupled charge pump for energy efficiency. Instead of using a fixed pumping frequency in the conventional $V_{pp}$ generator, our proposed $V_{pp}$ generator adopts a voltage-controlled oscillator and uses variable frequencies to reduce the ramp-up time. As a result, our $V_{pp}$ generator generates 3.0 V output voltage with 24.0-${\mu}s$ ramp-up time at 2 mA current load and 1 nF capacitor load with 1.2 V supply voltage. Experimental results show that the proposed $V_{pp}$ generator consumes around 26% less energy (1573 nJ $\rightarrow$ 1162 nJ) and reduces 29% less ramp-up time (33.7-${\mu}s$ $\rightarrow$ 24.0-${\mu}s$) compared to the conventional approach.

Analysis of the Interface Trap Effect on Electrical Characteristic and Reliability of SANOS Memory Cell Transistor (SANOS 메모리 셀 트랜지스터에서 Tunnel Oxide-Si Substrate 계면 트랩에 따른 소자의 전기적 특성 및 신뢰성 분석)

  • Park, Sung-Soo;Choi, Won-Ho;Han, In-Shik;Na, Min-Ki;Om, Jae-Chul;Lee, Seaung-Suk;Bae, Gi-Hyun;Lee, Hi-Deok;Lee, Ga-Won
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.11a
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    • pp.94-95
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    • 2007
  • In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program speed, reliability of memory device on interface trap between Si substrate and tunneling oxide was investigated. The devices were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SONOS cell transistors with larger interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. Therefore, to improve SANOS memory characteristic, it is very important to optimize the interface trap and charge trapping layer.

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Design of MTP memory IP using vertical PIP capacitor (Vertical PIP 커패시터를 이용한 MTP 메모리 IP 설계)

  • Kim, Young-Hee;Cha, Jae-Han;Jin, Hongzhou;Lee, Do-Gyu;Ha, Pan-Bong;Park, Mu-Hun
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.1
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    • pp.48-57
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    • 2020
  • MCU used in applications such as wireless chargers and USB type-C require MTP memory with a small cell size and a small additional process mask. Conventional double poly EEPROM cells are small in size, but additional processing masks of about 3 to 5 sheets are required, and FN tunneling type single poly EEPROM cells have a large cell size. In this paper, a 110nm MTP cell using a vertical PIP capacitor is proposed. The erase operation of the proposed MTP cell uses FN tunneling between FG and EG, and the program operation uses CHEI injection method, which reduces the MTP cell size to 1.09㎛2 by sharing the PW of the MTP cell array. Meanwhile, MTP memory IP required for applications such as USB type-C needs to operate over a wide voltage range of 2.5V to 5.5V. However, the pumping current of the VPP charge pump is the lowest when the VCC voltage is the minimum 2.5V, while the ripple voltage is large when the VCC voltage is 5.5V. Therefore, in this paper, the VPP ripple voltage is reduced to within 0.19V through SPICE simulation because the pumping current is suppressed to 474.6㎂ even when VCC is increased by controlling the number of charge pumps turned on by using the VCC detector circuit.

Design of 256Kb EEPROM IP Aimed at Battery Applications (배터리 응용을 위한 1.5V 단일전원 256Kb EEPROM IP 설계)

  • Kim, Young-Hee;Jin, RiJun;Ha, Pan-Bong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.10 no.6
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    • pp.558-569
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    • 2017
  • In this paper, a 256Kb EEPROM IP aimed at battery applications using a single supply of 1.5V which is embedded into an MCU is designed. In the conventional cross-coupled VPP (boosted voltage) charge pump using a body-potential biasing circuit, cross-coupled PMOS devices of 5V in it can be broken by the junction or gate oxide breakdown due to a high voltage of 8.53V applied to them in exiting the program or erase mode. Since each pumping node is precharged to the input voltage of the pumping stage at the same time that the output node is precharged to VDD in the cross-coupled charge pump, a high voltage of above 5.5V is prevented from being applied to them and thus the breakdown does not occur. Also, all erase, even program, odd program, and all program modes are supported to reduce the times of erasing and programming 256 kilo bits of cells. Furthermore, disturbance test time is also reduced since disturbance is applied to all the 256 kilo bits of EEPROM cells at once in the cell disturb test modes to reduce the cell disturbance testing time. Lastly, a CG driver with a short disable time to meet the cycle time of 40ns in the erase-verify-read mode is newly proposed.

Design of Low-Area DC-DC Converter for 1.5V 256kb eFlash Memory IPs (1.5V 256kb eFlash 메모리 IP용 저면적 DC-DC Converter 설계)

  • Kim, YoungHee;Jin, HongZhou;Ha, PanBong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.15 no.2
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    • pp.144-151
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    • 2022
  • In this paper, a 1.5V 256kb eFlash memory IP with low area DC-DC converter is designed for battery application. Therefore, in this paper, 5V NMOS precharging transistor is used instead of cross-coupled 5V NMOS transistor, which is a circuit that precharges the voltage of the pumping node to VIN voltage in the unit charge pump circuit for the design of a low-area DC-DC converter. A 5V cross-coupled PMOS transistor is used as a transistor that transfers the boosted voltage to the VOUT node. In addition, the gate node of the 5V NMOS precharging transistor is made to swing between VIN voltage and VIN+VDD voltage using a boost-clock generator. Furthermore, to swing the clock signal, which is one node of the pumping capacitor, to full VDD during a small ring oscillation period in the multi-stage charge pump circuit, a local inverter is added to each unit charge pump circuit. And when exiting from erase mode and program mode and staying at stand-by state, HV NMOS transistor is used to precharge to VDD voltage instead of using a circuit that precharges the boosted voltage to VDD voltage. Since the proposed circuit is applied to the DC-DC converter circuit, the layout area of the 256kb eFLASH memory IP is reduced by about 6.5% compared to the case of using the conventional DC-DC converter circuit.