• 전자공학회논문지A
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• 제33A권4호
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• pp.112-120
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• 1996

With the MOsES (mask oxide sidewall etch scheme)process which uses the conventional i-line stepper and isotropic wet etching, CMOSFET's with fine gate pattern of 0.1.mu.m CMOSFET device, the screening oxide is deposited before the low energy ion implantation for source/drain extensions and two step sidewall scheme is adopted. Through the characterization of 0.1.mu.m CMOSFET device, it is found that the screening oxide deposition sheme has larger capability of suppressing the short channel effects than two step sidewall schem. In cse of 200.angs.-thick screening oxide deposition, both NMOSFET and PMOSFET maintain good subthreshold characteristics down to 0.1.mu.m effective channel lengths, and show affordable drain saturation current reduction and low impact ionization rates.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1118-1121
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• 2009

We have fabricated inverted staggered pentacene Thin Film Transistor (TFT) with 1-${\mu}m$ channel length by micro contact printing (${\mu}$-CP) method. Patterning of micro-scale source/drain electrodes without etching was successfully achieved using silver nano particle ink, Polydimethylsiloxane (PDMS) stamp and FC-150 flip chip aligner-bonder. Sheet resistance of the printed Ag nano particle films were effectively reduced by two step annealing at $180^{\circ}C$.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1193-1196
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• 2009

Low resistivity interconnection and high-mobility channel are required to realize ultrahigh-definition LCDs such as 4k ${\times}$ 2k TVs. We evaluated fully Cu-based gate and Source/Drain interconnections, consisting of stacked pure-Cu/Cu-Mn layers for TFT-LCDs, and found the underlying Cu-Mn alloy film has superior adhesion to glass substrates and CVD-SiOx films. It was also confirmed that wet etching of the Cu/Cu-Mn films without residues and low contact resistance with both channel IGZO and pixel ITO films can be obtained. It is thus considered that the stacked Cu/Cu-Mn structure is one of candidates to replacing conventionally pure-Cu/refractory metal.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 G
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• pp.3268-3270
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• 1999

This paper presents the fabrication of a micro electromagnetic flowmeter for liquid flow rate measurement. The flowmeter consists of a silicon flow channel with two electrodes and two permanent magnets. The micro flow channel and the detection electrodes are fabricated by the anisotropic etching of two silicon substrates and the metal evaporation process respectively. If conductive fluid passes through a magnet field, electromotive force is generated and detected by two electrodes. When the flow rate is 2.6 ml/sec, the measured output voltage is 7.4 mV.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.881-884
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• 2004

The robust and large-area applicable metal shadow masks with a high aspect ratio more than 20 are fabricated by a combination of micro-electro-discharge machining (${\mu}$-EDM) and electro chemical etching (ECE). After defining S/D contacts using a 100 ${\mu}m$ thick stainless steel shadow mask, the top-contact pentacene TFTs with channel length of 5 ${\mu}m$ showed routinely the results of mobility of 0.498 ${\pm}$ 0.05 $cm^2$/Vsec, current on/off ratio of 1.6 ${times}$ $10^5$, and threshold voltage of 0 V. The straightly defined atomic force microscopy (AFM) images of channel area demonstrated that shadow effects caused by the S/D electrode deposition were negligible. The fabricated pentacene TFTs have an average channel length of 5 ${\pm}$ 0.25 ${\mu}m$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.44-44
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• 2009

Recently, transparent ZnO-based TFTs have attracted much attention for flexible displays because they can be fabricated on plastic substrates at low temperature. We report the fabrication and characteristics of ZnO channel layers(ZnO TFTs) having different channel thicknesses. The ZnO film were deposited as active channel layers on $Si_3N_4/Ti/SiO_2p$-Si substrates by rf magnetron sputtering at $100\;^{\circ}C$ without additional annealing. Also the Zno thin films deposited at oxygen partial pressures of 40%. ZnO TFTs using a bottom-gate configuration were investigated. The $Si_3N_4$ film were deposited as gate insulator by PE-CVD at $15\;^{\circ}C$. All Processes were processed below $150^{\circ}C$ which is optimal temperature for flexible display and were used dry etching method.

• Journal of Electrical Engineering and Technology
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• 제10권3호
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• pp.1131-1137
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• 2015

Gallium nitride (GaN) is a promising material for next-generation high-power applications due to its wide bandgap, high breakdown field, high electron mobility, and good thermal conductivity. From a structure point of view, the vertical device is more suitable to high-power applications than planar devices because of its area effectiveness. However, it is challenging to obtain a completely upright vertical structure due to inevitable sidewall slope in anisotropic etching of GaN. In this letter, we design and analyze the enhancement-mode n-channel vertical GaN MOSFET with variation of sidewall gate angle by two-dimensional (2D) technology computer-aided design (TCAD) simulations. As the sidewall slope gets closer to right angle, the device performances are improved since a gradual slope provides a leakage current path through the bulk region.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.145-148
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• 2007

The authors report on the fabrication of thin film transistors (TFTs) that use amorphous indium-gallium-zinc oxide (a-IGZO) channel and have the channel length (L) and width (W) patterned by dry etching. To prevent the plasma damage of active channel, a 100-nm-thckness $SiO_{x}$ by PECVD was adopted as an etch-stopper structure. IGZO TFT (W/L=10/50${\mu}m$) fabricated on glass exhibited the high performance mobility of $35.8\;cm^2/Vs$, a subthreshold gate voltage swing of $0.59V/dec$, and $I_{on/off}$ of $4.9{\times}10^6$. In addition, 4.1” transparent QCIF active-matrix organic light-emitting diode display were successfully fabricated, which was driven by a-IGZO TFTs.

• 한국연소학회:학술대회논문집
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• 한국연소학회 2006년도 제33회 KOSCO SYMPOSIUM 논문집
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• pp.235-241
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• 2006

Catalytic combustion is one of the suitable methods for micro power source due to high energy density and no flame quenching. Catalyst loading in the micro structured combustion chamber is one of the most important issues in the development of micro catalytic combustors. In this research, to coat catalyst on the chamber wall, two methods were investigated. First, $Al_2O_3$ was selected as a support of Pt and $Pt/Al_2O_3$ was synthesized through the alumina sol-gel procedure. To improve the coating thickness and adhesion between catalyst and substrate, heat resistant and water solvable organic-inorganic hybrid binder was used. Porous silicon was also investigated as a catalyst support for platinum. Through the parametric studies of current density and etching time, fabrication process of $1{\sim}2{\mu}m$ of diameter and about $25{\mu}m$ depth pores was confirmed. Coated substrates were test in the micro channel combustor which was fabricated by the wet etching and machining of SUS 304. Using $Pt/Al_2O_3$ coated substrate and Pt coated porous silicon substrate, conversion rate of fuel was over 95% for $H_2$/Air premixed gas.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.1277-1280
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• 2005

A high-aspect-ratio and high-resolution stainless steel shadow mask for organic thin-film transistors (OTFTs) circuit has been fabricated by a new method which combines photochemical machining, micro-electrical discharge machining (micro-EDM), and electrochemical etching (ECE). First, connection lines and source-drain holes are roughly machined by photochemical etching, and then the part of source and drain holes is finished by the combination of micro-EDM and ECE processes. Using this method a $100\;\mu{m}$ thick stainless steel (AISI 304) shadow mask for inverter can be fabricated with the channel length of $30\;\mu{m}\;and\;10\;\mu{m}\;respectively.\;The\;width\;of\;connection line\;is\;150\;\mu{m}$. The aspect ratio of the wall is about 5 and 15, respectively. Metal lines and source-drain electrodes of OTFTs were successfully deposited through the fabricated shadow mask.