• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.22-22
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• 2009

The silver thick film has been used in many industries such as display, chip, solar cell, automobile, and decoration with conventional heating. The silver thick film is fired with optimal time and temperature. However, decreasing the fabrication time is required due to high production power. Furthermore, there is a problem that silver in electrode is diffused throughout any substrates. For inhibiting the Ag diffusion and long fabrication time we considered a microwave heating. We investigated firing of silver thick film with conventional and microwave heating. The temperature of substrate was measured by thermal paper and the temperature of substrate was under $100\;^{\circ}C$ The shrinkage of electrode was measured with optical microscopy and optical profilometry. The shrinkage of electrode heat treated with microwave for 5min was similar to the that fired by the conventional heating for several hours. After firing by two types of heating, the diffusion of silver was determined using a optical microscope. The microstructure of sintered silver thick film was observed by SEM. Based on our results, the microwave heating should be a candidate heating source for the fabrication electronic devices in terms of saving the tact time and preventing the contamination of substrate.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.7
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• pp.411-421
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• 2002

In this Paper we propose a new Image analysis algorithm for microarray processing and a method to locate the position of the grid cell using the topology of the grid spots. Microarray is a device which enables a parallel experiment of 10 to 100 thousands of test genes in order to measure the gene expression. Because of the huge data obtained by a experiment automated image analysis is needed. The final output of this microarray experiment is a set of 16-bit gray level image files which consist of grid-structured spots. In this paper we propose one algorithm which located the address of spots (spot indices) using graph structure from image data and a method which determines the precise location and shape of each spot by measuring the inclination of grid structure. Several experiments are given from real data sets.

• Journal of Animal Science and Technology
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• v.50 no.6
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• pp.849-856
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• 2008

The present study was undertaken to investigate specific immune response of Rubus coreanus Miquel (raspberry) in pig spleen lymphocytes and gene expression induced by the extracts of raspberry using gene chip technology. The 70% ethyl alcohol extracts of raspberry were treated to pig spleen lymphocytes. The extracts of raspberry stimulated the proliferation of splenocytes and increased the population of CD3 & CD4 T-cells and B-cells in pig spleen lymphocytes. The extracts of raspberry improved immune response by increasing the viability of splenocytes. In microarray study we found eight genes were significantly up- regulated by the extracts of raspberry in pig splenocytes, including genes known to be involved in cell structure and immune response, particularly microtubule-associated protein 4, cytoplasmic dynein heavy chain, tumor necrosis factor alpha, lymphotoxin-beta receptor precursor. However, ten genes were down- regulated by the extracts of raspberry treatment.

• Journal of Pharmacopuncture
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• v.8 no.1
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• pp.31-40
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• 2005

Objectives : It has long been known about the osteogenic effect of CTF-HAS on bone tissues. However, it has not been determined the effect of CTF-HAS on cancer cells. The purpose of this study is to screen the CTF-HAS mediated differentially expressed genes in cancer cells such as SNU484 gastric cancer cell lines. Oligonucleotide microarray approach were employed to screen the differential expression genes. Methods : CTF-HAS was prepared by boiling and stored at $-70^{\circ}C$ until use. Cells were treated with various concentrations of CTF-HAS(0.1, 0.5, 1.5, 10, 20mg/ml) for 24 h. Cytotoxicity was tested by MTT assay. To screen the differentially expressed genes in cancer cells, cells were treated with 1.5mg/ml of CTF-HAS. For oligonucleotide microarry assay, total RNA was used for gene expression analysis using oligonucleotide genechip (Human genome U133 Plus 2.0., Affimatrix Co.). Results : It has no cytotoxic effects on HepG2 cells in all concentration (0.1, 0.5, 1.5, 10,20mg/ml). More than twofold up-regulated genes were 5 genes. The number of more than twofold down-regulated genes was 10. Discussion : This study showed the screening of CTF-HAS mediated differentially regulated genes using combined approaches of oligonucleotide microarray. The screened genes will be used for the better understanding in therapeutic effect of CTF-HAS on cancer field.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.3C
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• pp.102-111
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• 2005

In this paper, we propose an advanced hardware architecture for the fast inter prediction engine of the video coding standard MPEG-4 AVC. We describe the algorithm and derive the hardware architecture emphasizing and real time operation of the quarter_pel based motion estimation. The fast inter prediction engine is composed of block segmentation, motion estimation, motion compensation, and the fast quarter_pel calculator. The proposed architecture has been verified by ARM-interfaced emulation board using Excalibur & Virtex2 FPGA, and also by synthesis on Samsung 0.18 um CMOS technology. The synthesis result shows that the proposed hardware can operate at 62.5MHz. In this case, it can process about 88 QCIF video frames per second. The hardware is being used as a core module when implementing a complete MPEG-4 AVC video encoder chip for real-time multimedia application.

• The Journal of Korean Medicine
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• v.31 no.4
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• pp.79-100
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• 2010

Objective: Production of ROS from glucose toxicity results in injury of pancreatic $\beta$-cells in diabetes models. This study was undertaken to examine the influence of Lespedeza Cuneata extract (LCE) on cytoprotective effects on glucose toxicity, insulin secretion and gene expression in RIN-m5F cells. Methods: First, we measured LCE's antioxidant activity by DPPH free radical-scavenging activity and SOD activity. After the various concentrations of LCE were added to the RIN-m5F cells, we measured cell viability with glucose stimulation by MTT assay and glucose-stimulated insulin secretion. We analyzed gene expression with Agilent whole mouse genome 44K oligo DNA microarray and searched for related pathways in KEGG (Kyoto Encyclopedia of Genes and Genomes). Lastly we measured INS-1, INS-2, INS-R, IRS-1, IRS-2, IRS-3, GLP-1R, and GLP-2R mRNA expression by real time RT-PCR. Results: Free radical-scavenging activity, SOD activity and insulin secretion increased dependent on LCE concentration, but LCE did not show considerable cytoprotective effect on RIN-m5F cells. More than twice expressed gene was 6362 in Oligo DNA chip. In KEGG, the most related pathway was the metabolic pathway. In the insulin signaling pathway, up expressed genes were Irs1, Mapk8, Akt1, and Lipe and down expressed genes were Rhoq, Fbp2, Prkar2b, Gck, and Prkag1. In real time RT-PCR, IRS-2, and IRS-3 expression increased significantly compared to the control group on LCE $12{\mu}g/m{\ell}$ concentration and GCK expression decreased significantly compared to the control group. Conclusions: These results show that LCE encourages insulin secretion and insulin metabolism by complicated gene mechanisms. Further mechanism study and clinical study seem to be necessary about Lespedeza Cuneata.

• The Journal of the Korea Contents Association
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• v.7 no.2
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• pp.92-99
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• 2007

This paper presented a low power design of a 32bit block cypher processor reduced from the original 128bit architecture. The primary purpose of this research is to evaluate physical implementation results rather than theoretical aspects. The data path and diffusion function of the processor were reduced to accommodate the smaller hardware size. As a running example demonstrating the design approach, we employed a modified ARIA algorithm having four S-boxes. The proposed 32bit ARIA processor comprises 13,893 gates which is 68.25% smaller than the original 128bit structure. The design was synthesized and verified based on the standard cell library of the MagnaChip's 0.35um CMOS Process. A transistor level power simulation shows that the power consumption of the proposed processor reduced to 61.4mW, which is 9.7% of the original 128bit design. The low power design of the block cypher Processor would be essential for improving security of battery-less wireless sensor networks or RFID.

• Journal of Korea Multimedia Society
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• v.13 no.7
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• pp.943-949
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• 2010

This paper presents some improvements on VLSI implementation of lifting-based 9/7 wavelet transform by optimization hardware multiplication. The proposed solution requires less logic area and power consumption without performance loss compared to previous wavelet filter structure based on lifting scheme. This paper proposes a better approach to the hardware implementation using Lefevre algorithm based on extensions of Pattern search methods. To compare the proposed structure to the previous solutions on full multiplier blocks, we implemented them using Verilog HDL. For a hardware implementation of the two solutions, the logical synthesis on 0.18 um standard cells technology show that area, maximum delay and power consumption of the proposed architecture can be reduced up to 51%, 43% and 30%, respectively, compared to previous solutions for a 200 MHz target clock frequency. Our evaluation show that when design VLSI chip of lifting-based 9/7 wavelet filter, our solution is better suited for standard-cell application-specific integrated circuits than prior works on complete multiplier blocks.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.3 s.333
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• pp.43-50
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• 2005

In this paper, quaternary logic gates using Down literal circuit(DLC) has been designed, and then synchronous Quaternary un/down counter using those gates has been proposed The proposed counter consists of T-type quaternary flip flop and 1-of-2 threshold-t MUX, and T-type quaternary flip flop consists of D-type quaternary flip flop and quaternary logic gates(modulo-4 addition gates, Quaternary inverter, identity cell, 1-of-4 MUX). The simulation result of this counter show delay time of 10[ns] and power consumption of 8.48[mW]. Also, assigning the designed counter to MVL(Multiple-valued Logic) circuit, it has advantages of the reduced interconnection and chip area as well as easy expansion of digit.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.79-84
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• 2006

This paper proposed a novel H.264 deblocking filter for low-power mobile multimedia SoCs. In H.264 deblocking filter, filtering can be skipped on some pixels when pixel value differences satisfy some specific conditions. Furthermore, whole filtering can be skipped when quantization parameter is less than 16. Based on these features, power consumption can be significantly reduced by shutting down deblocking filter partially or as a whole. The proposed deblocking filter can shut down partial or whole blocks with simple control circuits. Common hardware performs both horizontal filtering and vertical filtering. It was implemented in silicon chip using $0.35{\mu}m$ standard cell library technology. The gate count is about 20,000 gates. The maximum operation frequency is 108MHz. The maximum throughput is 30 frame/s with CCIR601 image format.