• Proceedings of the Optical Society of Korea Conference
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• 2003.07a
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• pp.38-39
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• 2003

전기적 저항이 낮은 투명 박막 물질은 현재 flat panel display, electroluminescent device, thin film transistor, solar cell 등 여러 분야에서 연구되고 있다. 그 중에서도 특히 ZnO：Ga는 현재 많이 쓰이는 ITO보다 화학적, 열적으로 안정한 상태를 보이는 투명 전도 산화막 물질로써 본 연구에서는 분광타원법을 이용하여 ZnO：Ga의 광학적 특성을 분석하였다. 본 연구를 위한 시료는 온도에 따른 ZnO：Ga／Sapphire 박막, $O_2$의 압력에 따른 ZnO：Ga／Sapphire 박막, Ga의 doping 농도에 따른 ZnO：Ga／Sapphire 박막으로 제작하였으며, 위상변조형 분광타원계(spectroscopic Phase Modulated Ellipsometer, Jobin-Yvon, UVISEL)를 사용하여 측정대역을 0.74 ~ 4.5 eV, 입사각을 70$^{\circ}$로 하여 측정하였다. (중략)

• Proceedings of the Korean Magnestics Society Conference
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• 2000.09a
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• pp.33-59
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• 2000

Demonstrated uniform MR and resistance across 6 inch wafer, Demonstrated successful integration of MTJ and CMOS, Measured address access time of 8ns and read cycle time of 18ns for 256${\times}$2 arrays at 3.0V using a single transistor and MTJ for a cell

• Journal of IKEEE
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• v.20 no.3
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• pp.220-225
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• 2016

In this paer, low on-resistance and high-power trench gate MOSFET (Metal-Oxide-Silicon Field Effect Transistor) incorporating current sensing FET (Field Effect Transistor) is proposed and evaluated. The trench gate power MOSFET was fabricated with $0.6{\mu}m$ trench width and $3.0{\mu}m$ cell pitch. Compared with the main switching MOSFET, the on-chip current sensing FET has the same device structure and geometry. In order to improve cell density and device reliability, self-aligned trench etching and hydrogen annealing techniques were performed. Moreover, maintaining low threshold voltage and simultaneously improving gate oxide relialility, the stacked gate oxide structure combining thermal and CVD (chemical vapor deposition) oxides was adopted. The on-resistance and breakdown voltage of the high density trench gate device were evaluated $24m{\Omega}$ and 100 V, respectively. The measured current sensing ratio and it's variation depending on the gate voltage were approximately 70:1 and less than 5.6 %.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.3
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• pp.312-320
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• 2019

In this paper, we design a 512Kb eFlash IP using 110nm eFlash cells. We proposed eFlash core circuit such as row driver circuit (CG/SL driver circuit), write BL driver circuit (write BL switch circuit and PBL switch select circuit), read BL switch circuit, and read BL S/A circuit which satisfy eFlash cell program, erase and read operation. In addition, instead of using a cross-coupled NMOS transistor as a conventional unit charge pump circuit, we propose a circuit boosting the gate of the 12V NMOS precharging transistor whose body is GND, so that the precharging node of the VPP unit charge pump is normally precharged to the voltage of VIN and thus the pumping current is increased in the VPP (boosted voltage) voltage generator circuit supplying the VPP voltage of 9.5V in the program mode and that of 11.5V in the erase mode. A 12V native NMOS pumping capacitor with a bigger pumping current and a smaller layout area than a PMOS pumping capacitor was used as the pumping capacitor. On the other hand, the layout area of the 512Kb eFlash memory IP designed based on the 110nm eFlash process is $933.22{\mu}m{\times}925{\mu}m(=0.8632mm^2)$.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.3.2-3.2
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• 2011

In recent years, inkjet printing technology has received significant attention as a micro/nanofabrication technique for flexible printing of electronic circuits and solar cells, as well for biomaterial patterning. It eliminates the need for physical masks, causes fewer environment problems, lowers fabrication costs, and offers good layer-to-layer registration. To fulfill the requirements for use in the above applications, however, the inkjet system must meet certain criteria such as high frequency jetting, uniform droplet size, high density nozzle array, etc. Existing inkjet devices are either based on thermal bubbles or piezoelectric pumping; they have several drawbacks for flexible printing. For instance, thermal bubble jetting has limitations in terms of size and density of the nozzle array as well as the ejection frequency. Piezoelectric based devices suffer from poor pumping energy in addition to inadequate ejection frequency. Recently, an electrohydrodynamic (EHD) printing technique has been suggested and proposed as an alternative to thermal bubble or piezoelectric devices. In EHD jetting, a liquid (ink) is pumped through a nozzle and a strong electric field is applied between the nozzle and an extractor plate, which induce charges at the surfaces of the liquid meniscus. This electric field creates an electric stress that stretches the meniscus in the direction of the electric field. Once the electric field force is larger than the surface tension force, a liquid droplet is formed. An EHD inkjet head can produce droplets smaller than the size of the nozzle that produce them. Furthermore, the EHD nano-inkjet can eject high viscosity liquid through the nozzle forming tiny structures. These unique features distinguish EHD printing from conventional methods for sub-micron resolution printing. In this presentation, I will introduce the recent research results regarding the EHD nano-inkjet and the printing system, which has been applied to solar cell or thin film transistor applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.31-38
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• 2010

This paper presents the design of a graphic memory for QVGA-scale LCD Driver IC (LDI). The graphic memory is designed based on the pseudo-SHAM for the purpose of small area, and the memory cell structure is designed using a bit line partitioning method to improve sensing characteristics and drivabilties in the line-read operation. Also, a collision protection circuit using C-gate is designed to control collisions between read/write operations and self-refresh/line-read operations effectively. The graphic memory circuit has been designed in transistor level using $0.18{\mu}m$ CMOS technology library and the operations of the graphic memory have been verified using Hspice. The results show that the bit-bitb line voltage difference, ${\Delta}V$ increases by 40%, the charge sharing time between bit and bitb voltages $T_{CHGSH}$ decreases by 30%, and the current during line-read decreases by 40%.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.94-95
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• 2007

In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program speed, reliability of memory device on interface trap between Si substrate and tunneling oxide was investigated. The devices were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SONOS cell transistors with larger interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. Therefore, to improve SANOS memory characteristic, it is very important to optimize the interface trap and charge trapping layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.115-116
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• 2012

The demand for flexible electronic systems such as wearable computers, E-paper, and flexible displays has increased due to their advantages of excellent portability, conformal contact with curved surfaces, light weight, and human friendly interfaces over present rigid electronic systems. This seminar introduces three recent progresses that can extend the application of high performance flexible inorganic electronics. The first part of this seminar will introduce a RRAM with a one transistor-one memristor (1T-1M) arrays on flexible substrates. Flexible memory is an essential part of electronics for data processing, storage, and radio frequency (RF) communication and thus a key element to realize such flexible electronic systems. Although several emerging memory technologies, including resistive switching memory, have been proposed, the cell-to-cell interference issue has to be overcome for flexible and high performance nonvolatile memory applications. The cell-to-cell interference between neighbouring memory cells occurs due to leakage current paths through adjacent low resistance state cells and induces not only unnecessary power consumption but also a misreading problem, a fatal obstacle in memory operation. To fabricate a fully functional flexible memory and prevent these unwanted effects, we integrated high performance flexible single crystal silicon transistors with an amorphous titanium oxide (a-TiO2) based memristor to control the logic state of memory. The $8{\times}8$ NOR type 1T-1M RRAM demonstrated the first random access memory operation on flexible substrates by controlling each memory unit cell independently. The second part of the seminar will discuss the flexible GaN LED on LCP substrates for implantable biosensor. Inorganic III-V light emitting diodes (LEDs) have superior characteristics, such as long-term stability, high efficiency, and strong brightness compared to conventional incandescent lamps and OLED. However, due to the brittle property of bulk inorganic semiconductor materials, III-V LED limits its applications in the field of high performance flexible electronics. This seminar introduces the first flexible and implantable GaN LED on plastic substrates that is transferred from bulk GaN on Si substrates. The superb properties of the flexible GaN thin film in terms of its wide band gap and high efficiency enable the dramatic extension of not only consumer electronic applications but also the biosensing scale. The flexible white LEDs are demonstrated for the feasibility of using a white light source for future flexible BLU devices. Finally a water-resist and a biocompatible PTFE-coated flexible LED biosensor can detect PSA at a detection limit of 1 ng/mL. These results show that the nitride-based flexible LED can be used as the future flexible display technology and a type of implantable LED biosensor for a therapy tool. The final part of this seminar will introduce a highly efficient and printable BaTiO3 thin film nanogenerator on plastic substrates. Energy harvesting technologies converting external biomechanical energy sources (such as heart beat, blood flow, muscle stretching and animal movements) into electrical energy is recently a highly demanding issue in the materials science community. Herein, we describe procedure suitable for generating and printing a lead-free microstructured BaTiO3 thin film nanogenerator on plastic substrates to overcome limitations appeared in conventional flexible ferroelectric devices. Flexible BaTiO3 thin film nanogenerator was fabricated and the piezoelectric properties and mechanically stability of ferroelectric devices were characterized. From the results, we demonstrate the highly efficient and stable performance of BaTiO3 thin film nanogenerator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.35-35
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• 2009

Capacitorless one transistor dynamic random access memory (1T-DRAM) cells were fabricated on the fully depleted strained-silicon-on-insulator (FD sSOI) and the effects of silicon back interface state on buried oxide (BOX) layer on the memory properties were evaluated. As a result, the fabricated 1T-DRAM cells showed superior electrical characteristics and a large sensing current margin (${\Delta}I_s$) between "1" state and "0" state. The back interface of SOI based capacitorless 1T-DRAM memory cell plays an important role on the memory performance. As the back interface properties were degraded by increase rapid thermal annealing (RTA) process, the performance of 1T-DRAM was also degraded. On the other hand, the properties of back interface and the performance of 1T-DRAM were considerably improved by post RTA annealing process at $450^{\circ}C$ for 30 min in a 2% $H_2/N_2$ ambient.

• IE interfaces
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• v.15 no.4
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• pp.325-337
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• 2002

In this study we consider the problem of production planning of TFT-LCD(Thin Film Transistor - Liquid Crystal Display) production factory. Due to the complexities of the TFT-LCD production processes, it is difficult to schedule the production planning, and the study about automated scheduler is insufficient. In addition, the existing production method is a Push-System to raise the operation rate with expensive equipment, that has the problem to satisfy the due-date. This study presents an algorithm having a concept of Pull-System that satisfies the due-date and considers specialties of TFT-LCD production process. We make MPS(Master Production Schedule) according to the sales order, and present algorithms for scheduling about In/Out plan considering factory capacity, line balancing, material requirement, and inventory level of all Array, Cell, and Module processes. These algorithms are integrated as an automated production system, and we implement them in the actual TFT-LCD factory circumstance.