• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1601-1602
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• 2006

A cascode low noise amplifier(LNA) for a 2.45GHz RFID reader is designed using 0.25um CMOS technology. There are four LNA design techniques applied to the cascode topology. In this paper, power-constrained simultaneous noise and input matching(PCSNIM) technique is used for low power consumption and achieving the noise matching and input matching simultaneously. Simulation results demonstrate a noise figure of 2.75dB, a power gain of 10.17dB, and a dissipation power of 8.65mW with 1V supply.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.5
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• pp.678-681
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• 2020

In this paper, we analyzed the noise figure of cascode low noise amplifier (LNA) based on the measured data of 65nm CMOS devices. By using the channel thermal noise model of transistors, we expanded noise figure equation and divided the equation into three parts to see its contributions to noise figure. We also varied design parameters such as bias point, transistor gate width, and operating frequency. Our results show that different noise sources dominate at the different operating frequencies. One can easily find the noise transition frequency with device models in ahead of the practical design. Therefore, this research provides a low noise design approach for different operating frequencies.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.5 s.335
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• pp.55-60
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• 2005

A V-band MIMIC quadruple subharmonic mixer is reported in this paper. The cascode harmonic generator is proposed for a high conversion gain. The proposed cascode harmonic generator is shown with a 4-th harmonic output characteristic that represents an average of 2.9 dB and a maximum of 4 dB higher than the conventional multiplier. The measured result of the subharmonic mixer has a conversion gain of 3_4 dB which a good conversion gain at a LO power of 13 dBm. Isolations of LO-to-IF and LO-to-RF were obtained -53.6 dB and -46.2 dB, respectively. The conversion gain of the subharmonic mixer in this study has a higher conversion gain compared with some other reports in millimeter-wave range.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.9
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• pp.25-33
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• 2007

In this paper, the high isolation and wideband 94 GHz MIMIC(Millimeter-wave Monolithic Integrated Circuit) single balanced cascode mixer was designed and fabricated. Also, we designed and fabricated a 3 dB tandem coupler which has a high isolation and wideband characteristic. The single balanced resistive mixer which does not require an external IF balun was designed using the 0.1 ${\mu}m$ InGaAs/InAlAs/GaAs metamorphic HEMT(High Electron Mobility Transistor). The DC characteristics of MHEMT's are 665 mA/mm of drain current density, 691 mS/mm of maximum transconductance. The current gain cut-off frequency($f_T$) is 189 GHz and the maximum oscillation frequency($f_{max}$) is 334 GHz. A 94 GHz single balanced cascode mixer was fabricated using our 0.1 ${\mu}m$ MHEMT MIMIC process. From the measurements, the fabricated couplers showed wideband characteristics. The conversion loss of single balanced cascode mixer was 9.8 dB at an LO power of 10.9 dBm. The LO to RF isolation of single balanced cascode mixer was 29.5 dB at 94 GHz. We obtained in this study a higher LO-RF isolation compared to some other single balanced mixers.

• 한국ITS학회:학술대회논문집
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• 2002.11a
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• pp.138-140
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• 2002

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.4
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• pp.278-283
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• 2013

This paper presents a design and fabrication of 0.5 V two stage operational amplifier. The proposed operational amplifier utilizes body-driven differential input stage and self-cascode current mirror structure. Cadence Virtuoso is used for layout and the layout data is verified by LVS through Mentor Calibre. The proposed two stage operational amplifier is fabricated using $0.13{\mu}m$ CMOS process and operation at 0.5 V is confirmed. Measured low frequency small signal gain of operational amplifier is 50 dB, power consumption is $29{\mu}W$ and chip area is $75{\mu}m{\times}90{\mu}m$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.647-653
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• 2005

According to the design concept of microwave front-end, a low noise amplifier block using HBT cascode topology is proposed to provide high gain and low noise figure with low bias current. We has implemented MMIC-LNA with a modified configuration using inductors to show low noise at the emitter and base of cascoded HBT-MMIC amplifier. The measured performance of the designed MMIC-LNA at 3.7GHz are a gain of 19dB, noise figure of 2.7dB and image rejection of 35dBc using a supply of 3mA and 2.7V. We can convinced that cascoded amplifier block to fulfill a high gain, low noise and image rejection if microwave front-end receiver is designed by cascode MMEC-LNA with the active image rejection filter.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.6
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• pp.558-565
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• 2015

Gallium nitride high-electron mobility transistor (GaN HEMT) is the strongest candidate for replacing Si MOSFET. Comparing the figure of merit (FOM) of GaN with the state-of-the-art super junction Si MOSFET, the FOM is much better because of the wide band gap characteristics and the heterojunction structure. Although GaN HEMT has many benefits for the power conversion system, the performance of the power conversion system with the GaN HEMT is sensitive because of its low threshold voltage ($V_{th}$) and even lower parasitic capacitance. This study examines the characteristics of a phase-shifted full-bridge dc-dc converter with cascode GaN HEMT. The problem of unoptimized dead time is analyzed on the basis of the output capacitance of GaN HEMT. In addition, the printed circuit board (PCB) layout consideration is analyzed to reduce the negative effects of parasitic inductance. A comparison of the experimental results is provided to validate the dead time and PCB layout analysis for a phase-shifted full-bridge dc-dc converter with cascode GaN HEMT.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.10
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• pp.1477-1483
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• 2013

This paper proposes a low-voltage current-mode integrator for a continuous-time current-mode baseband channel selection filter. The low-voltage current-mode linear cascode integrator is introduced to offer advantages of high current gain and improved unity-gain frequency. The proposed current-mode integrator has fully differential input and output structure consisting of CMOS complementary circuit. Additional cascode transistors which are operated in linear region are inserted for bias to achieve the low-voltage feature. Frequency range is also controllable by selecting proper bias voltage. From simulation results, it can be noticed that the implemented integrator achieves design specification such as low-voltage operation, current gain, and unity gain frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.5
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• pp.472-478
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• 2003

In this paper, a near zero If mixer was designed in cascode structure by using two single-gate FETs. Since it is driven by the second order harmonic of LO signal, a sub-harmonic cascode FET mixer has good LO-RF port isolation characteristic. In order to solve DC offset of a homodyne system, near zero If is used instead of zero If and the mixer is driven by sub-harmonic of LO signal. As RF input power was -30 dBm and LO power was 6 dBm, the designed mixer had 6.7 dB conversion gain, 8.4 dB noise figure, 31.5 dB LO-RF port isolation, -1.9 dBm lIP3 and -2.8 dBm IIP2.